2 include/comedi.h (installed as /usr/include/comedi.h)
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 1998-2001 David A. Schleef <ds@schleef.org>
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU Lesser General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
32 /* comedi's major device number */
33 #define COMEDI_MAJOR 98
36 maximum number of minor devices. This can be increased, although
37 kernel structures are currently statically allocated, thus you
38 don't want this to be much more than you actually use.
40 #define COMEDI_NDEVICES 16
42 /* number of config options in the config structure */
43 #define COMEDI_NDEVCONFOPTS 32
44 /*length of nth chunk of firmware data*/
45 #define COMEDI_DEVCONF_AUX_DATA3_LENGTH 25
46 #define COMEDI_DEVCONF_AUX_DATA2_LENGTH 26
47 #define COMEDI_DEVCONF_AUX_DATA1_LENGTH 27
48 #define COMEDI_DEVCONF_AUX_DATA0_LENGTH 28
49 #define COMEDI_DEVCONF_AUX_DATA_HI 29 /*most significant 32 bits of pointer address (if needed)*/
50 #define COMEDI_DEVCONF_AUX_DATA_LO 30 /*least significant 32 bits of pointer address*/
51 #define COMEDI_DEVCONF_AUX_DATA_LENGTH 31 /* total data length */
53 /* max length of device and driver names */
54 #define COMEDI_NAMELEN 20
57 typedef unsigned int lsampl_t;
58 typedef unsigned short sampl_t;
60 /* packs and unpacks a channel/range number */
62 #define CR_PACK(chan,rng,aref) ( (((aref)&0x3)<<24) | (((rng)&0xff)<<16) | (chan) )
63 #define CR_PACK_FLAGS(chan, range, aref, flags) (CR_PACK(chan, range, aref) | ((flags) & CR_FLAGS_MASK))
65 #define CR_CHAN(a) ((a)&0xffff)
66 #define CR_RANGE(a) (((a)>>16)&0xff)
67 #define CR_AREF(a) (((a)>>24)&0x03)
69 #define CR_FLAGS_MASK 0xfc000000
70 #define CR_ALT_FILTER (1<<26)
71 #define CR_DITHER CR_ALT_FILTER
72 #define CR_DEGLITCH CR_ALT_FILTER
73 #define CR_ALT_SOURCE (1<<27)
74 #define CR_EDGE (1<<30)
75 #define CR_INVERT (1<<31)
77 #define AREF_GROUND 0x00 /* analog ref = analog ground */
78 #define AREF_COMMON 0x01 /* analog ref = analog common */
79 #define AREF_DIFF 0x02 /* analog ref = differential */
80 #define AREF_OTHER 0x03 /* analog ref = other (undefined) */
82 /* counters -- these are arbitrary values */
83 #define GPCT_RESET 0x0001
84 #define GPCT_SET_SOURCE 0x0002
85 #define GPCT_SET_GATE 0x0004
86 #define GPCT_SET_DIRECTION 0x0008
87 #define GPCT_SET_OPERATION 0x0010
88 #define GPCT_ARM 0x0020
89 #define GPCT_DISARM 0x0040
90 #define GPCT_GET_INT_CLK_FRQ 0x0080
92 #define GPCT_INT_CLOCK 0x0001
93 #define GPCT_EXT_PIN 0x0002
94 #define GPCT_NO_GATE 0x0004
95 #define GPCT_UP 0x0008
96 #define GPCT_DOWN 0x0010
97 #define GPCT_HWUD 0x0020
98 #define GPCT_SIMPLE_EVENT 0x0040
99 #define GPCT_SINGLE_PERIOD 0x0080
100 #define GPCT_SINGLE_PW 0x0100
101 #define GPCT_CONT_PULSE_OUT 0x0200
102 #define GPCT_SINGLE_PULSE_OUT 0x0400
106 #define INSN_MASK_WRITE 0x8000000
107 #define INSN_MASK_READ 0x4000000
108 #define INSN_MASK_SPECIAL 0x2000000
110 #define INSN_READ ( 0 | INSN_MASK_READ)
111 #define INSN_WRITE ( 1 | INSN_MASK_WRITE)
112 #define INSN_BITS ( 2 | INSN_MASK_READ|INSN_MASK_WRITE)
113 #define INSN_CONFIG ( 3 | INSN_MASK_READ|INSN_MASK_WRITE)
114 #define INSN_GTOD ( 4 | INSN_MASK_READ|INSN_MASK_SPECIAL)
115 #define INSN_WAIT ( 5 | INSN_MASK_WRITE|INSN_MASK_SPECIAL)
116 #define INSN_INTTRIG ( 6 | INSN_MASK_WRITE|INSN_MASK_SPECIAL)
119 /* These flags are used in comedi_trig structures */
121 #define TRIG_BOGUS 0x0001 /* do the motions */
122 #define TRIG_DITHER 0x0002 /* enable dithering */
123 #define TRIG_DEGLITCH 0x0004 /* enable deglitching */
124 //#define TRIG_RT 0x0008 /* perform op in real time */
125 #define TRIG_CONFIG 0x0010 /* perform configuration, not triggering */
126 #define TRIG_WAKE_EOS 0x0020 /* wake up on end-of-scan events */
127 //#define TRIG_WRITE 0x0040 /* write to bidirectional devices */
130 /* These flags are used in comedi_cmd structures */
132 #define CMDF_PRIORITY 0x00000008 /* try to use a real-time interrupt while performing command */
134 #define TRIG_RT CMDF_PRIORITY /* compatibility definition */
136 #define CMDF_WRITE 0x00000040
137 #define TRIG_WRITE CMDF_WRITE /* compatibility definition */
139 #define CMDF_RAWDATA 0x00000080
141 #define COMEDI_EV_START 0x00040000
142 #define COMEDI_EV_SCAN_BEGIN 0x00080000
143 #define COMEDI_EV_CONVERT 0x00100000
144 #define COMEDI_EV_SCAN_END 0x00200000
145 #define COMEDI_EV_STOP 0x00400000
147 #define TRIG_ROUND_MASK 0x00030000
148 #define TRIG_ROUND_NEAREST 0x00000000
149 #define TRIG_ROUND_DOWN 0x00010000
150 #define TRIG_ROUND_UP 0x00020000
151 #define TRIG_ROUND_UP_NEXT 0x00030000
153 /* trigger sources */
155 #define TRIG_ANY 0xffffffff
156 #define TRIG_INVALID 0x00000000
158 #define TRIG_NONE 0x00000001 /* never trigger */
159 #define TRIG_NOW 0x00000002 /* trigger now + N ns */
160 #define TRIG_FOLLOW 0x00000004 /* trigger on next lower level trig */
161 #define TRIG_TIME 0x00000008 /* trigger at time N ns */
162 #define TRIG_TIMER 0x00000010 /* trigger at rate N ns */
163 #define TRIG_COUNT 0x00000020 /* trigger when count reaches N */
164 #define TRIG_EXT 0x00000040 /* trigger on external signal N */
165 #define TRIG_INT 0x00000080 /* trigger on comedi-internal signal N */
166 #define TRIG_OTHER 0x00000100 /* driver defined */
168 /* subdevice flags */
170 #define SDF_BUSY 0x0001 /* device is busy */
171 #define SDF_BUSY_OWNER 0x0002 /* device is busy with your job */
172 #define SDF_LOCKED 0x0004 /* subdevice is locked */
173 #define SDF_LOCK_OWNER 0x0008 /* you own lock */
174 #define SDF_MAXDATA 0x0010 /* maxdata depends on channel */
175 #define SDF_FLAGS 0x0020 /* flags depend on channel */
176 #define SDF_RANGETYPE 0x0040 /* range type depends on channel */
177 #define SDF_MODE0 0x0080 /* can do mode 0 */
178 #define SDF_MODE1 0x0100 /* can do mode 1 */
179 #define SDF_MODE2 0x0200 /* can do mode 2 */
180 #define SDF_MODE3 0x0400 /* can do mode 3 */
181 #define SDF_MODE4 0x0800 /* can do mode 4 */
182 #define SDF_CMD 0x1000 /* can do commands (deprecated) */
183 #define SDF_SOFT_CALIBRATED 0x2000 /* subdevice uses software calibration */
184 #define SDF_CMD_WRITE 0x4000 /* can do output commands */
185 #define SDF_CMD_READ 0x8000 /* can do input commands */
187 #define SDF_READABLE 0x00010000 /* subdevice can be read (e.g. analog input) */
188 #define SDF_WRITABLE 0x00020000 /* subdevice can be written (e.g. analog output) */
189 #define SDF_WRITEABLE SDF_WRITABLE /* spelling error in API */
190 #define SDF_INTERNAL 0x00040000 /* subdevice does not have externally visible lines */
191 #define SDF_RT 0x00080000 /* DEPRECATED: subdevice is RT capable */
192 #define SDF_GROUND 0x00100000 /* can do aref=ground */
193 #define SDF_COMMON 0x00200000 /* can do aref=common */
194 #define SDF_DIFF 0x00400000 /* can do aref=diff */
195 #define SDF_OTHER 0x00800000 /* can do aref=other */
196 #define SDF_DITHER 0x01000000 /* can do dithering */
197 #define SDF_DEGLITCH 0x02000000 /* can do deglitching */
198 #define SDF_MMAP 0x04000000 /* can do mmap() */
199 #define SDF_RUNNING 0x08000000 /* subdevice is acquiring data */
200 #define SDF_LSAMPL 0x10000000 /* subdevice uses 32-bit samples */
201 #define SDF_PACKED 0x20000000 /* subdevice can do packed DIO */
203 /* subdevice types */
205 #define COMEDI_SUBD_UNUSED 0 /* unused */
206 #define COMEDI_SUBD_AI 1 /* analog input */
207 #define COMEDI_SUBD_AO 2 /* analog output */
208 #define COMEDI_SUBD_DI 3 /* digital input */
209 #define COMEDI_SUBD_DO 4 /* digital output */
210 #define COMEDI_SUBD_DIO 5 /* digital input/output */
211 #define COMEDI_SUBD_COUNTER 6 /* counter */
212 #define COMEDI_SUBD_TIMER 7 /* timer */
213 #define COMEDI_SUBD_MEMORY 8 /* memory, EEPROM, DPRAM */
214 #define COMEDI_SUBD_CALIB 9 /* calibration DACs */
215 #define COMEDI_SUBD_PROC 10 /* processor, DSP */
216 #define COMEDI_SUBD_SERIAL 11 /* serial IO */
218 /* configuration instructions */
220 enum configuration_ids
222 INSN_CONFIG_DIO_INPUT = 0,
223 INSN_CONFIG_DIO_OUTPUT = 1,
224 INSN_CONFIG_DIO_OPENDRAIN = 2,
225 INSN_CONFIG_ANALOG_TRIG = 16,
226 // INSN_CONFIG_WAVEFORM = 17,
227 // INSN_CONFIG_TRIG = 18,
228 // INSN_CONFIG_COUNTER = 19,
229 INSN_CONFIG_ALT_SOURCE = 20,
230 INSN_CONFIG_DIGITAL_TRIG = 21,
231 INSN_CONFIG_BLOCK_SIZE = 22,
232 INSN_CONFIG_TIMER_1 = 23,
233 INSN_CONFIG_FILTER = 24,
234 INSN_CONFIG_CHANGE_NOTIFY = 25,
237 INSN_CONFIG_SERIAL_CLOCK = 26,
238 INSN_CONFIG_BIDIRECTIONAL_DATA = 27,
239 INSN_CONFIG_DIO_QUERY = 28,
240 INSN_CONFIG_PWM_OUTPUT = 29,
241 INSN_CONFIG_GET_PWM_OUTPUT = 30,
242 INSN_CONFIG_ARM = 31,
243 INSN_CONFIG_DISARM = 32,
244 INSN_CONFIG_GET_COUNTER_STATUS = 33,
245 INSN_CONFIG_RESET = 34,
246 INSN_CONFIG_GPCT_SINGLE_PULSE_GENERATOR = 1001, // Use CTR as single pulsegenerator
247 INSN_CONFIG_GPCT_PULSE_TRAIN_GENERATOR = 1002, // Use CTR as pulsetraingenerator
248 INSN_CONFIG_GPCT_QUADRATURE_ENCODER = 1003, // Use the counter as encoder
249 INSN_CONFIG_SET_GATE_SRC = 2001, // Set gate source
250 INSN_CONFIG_GET_GATE_SRC = 2002, // Get gate source
251 INSN_CONFIG_SET_CLOCK_SRC = 2003, // Set master clock source
252 INSN_CONFIG_GET_CLOCK_SRC = 2004, // Get master clock source
253 INSN_CONFIG_SET_COUNTER_MODE = 4097,
254 INSN_CONFIG_8254_SET_MODE = INSN_CONFIG_SET_COUNTER_MODE, /* deprecated */
255 INSN_CONFIG_8254_READ_STATUS = 4098,
256 INSN_CONFIG_SET_ROUTING = 4099,
257 INSN_CONFIG_GET_ROUTING = 4109,
260 enum comedi_io_direction
270 #define COMEDI_DEVCONFIG _IOW(CIO,0,comedi_devconfig)
271 #define COMEDI_DEVINFO _IOR(CIO,1,comedi_devinfo)
272 #define COMEDI_SUBDINFO _IOR(CIO,2,comedi_subdinfo)
273 #define COMEDI_CHANINFO _IOR(CIO,3,comedi_chaninfo)
274 #define COMEDI_TRIG _IOWR(CIO,4,comedi_trig)
275 #define COMEDI_LOCK _IO(CIO,5)
276 #define COMEDI_UNLOCK _IO(CIO,6)
277 #define COMEDI_CANCEL _IO(CIO,7)
278 #define COMEDI_RANGEINFO _IOR(CIO,8,comedi_rangeinfo)
279 #define COMEDI_CMD _IOR(CIO,9,comedi_cmd)
280 #define COMEDI_CMDTEST _IOR(CIO,10,comedi_cmd)
281 #define COMEDI_INSNLIST _IOR(CIO,11,comedi_insnlist)
282 #define COMEDI_INSN _IOR(CIO,12,comedi_insn)
283 #define COMEDI_BUFCONFIG _IOR(CIO,13,comedi_bufconfig)
284 #define COMEDI_BUFINFO _IOWR(CIO,14,comedi_bufinfo)
285 #define COMEDI_POLL _IO(CIO,15)
290 typedef struct comedi_trig_struct comedi_trig;
291 typedef struct comedi_cmd_struct comedi_cmd;
292 typedef struct comedi_insn_struct comedi_insn;
293 typedef struct comedi_insnlist_struct comedi_insnlist;
294 typedef struct comedi_chaninfo_struct comedi_chaninfo;
295 typedef struct comedi_subdinfo_struct comedi_subdinfo;
296 typedef struct comedi_devinfo_struct comedi_devinfo;
297 typedef struct comedi_devconfig_struct comedi_devconfig;
298 typedef struct comedi_rangeinfo_struct comedi_rangeinfo;
299 typedef struct comedi_krange_struct comedi_krange;
300 typedef struct comedi_bufconfig_struct comedi_bufconfig;
301 typedef struct comedi_bufinfo_struct comedi_bufinfo;
303 struct comedi_trig_struct{
304 unsigned int subdev; /* subdevice */
305 unsigned int mode; /* mode */
307 unsigned int n_chan; /* number of channels */
308 unsigned int *chanlist; /* channel/range list */
309 sampl_t *data; /* data list, size depends on subd flags */
310 unsigned int n; /* number of scans */
311 unsigned int trigsrc;
312 unsigned int trigvar;
313 unsigned int trigvar1;
314 unsigned int data_len;
315 unsigned int unused[3];
318 struct comedi_insn_struct{
323 unsigned int chanspec;
324 unsigned int unused[3];
327 struct comedi_insnlist_struct{
328 unsigned int n_insns;
332 struct comedi_cmd_struct{
336 unsigned int start_src;
337 unsigned int start_arg;
339 unsigned int scan_begin_src;
340 unsigned int scan_begin_arg;
342 unsigned int convert_src;
343 unsigned int convert_arg;
345 unsigned int scan_end_src;
346 unsigned int scan_end_arg;
348 unsigned int stop_src;
349 unsigned int stop_arg;
351 unsigned int *chanlist; /* channel/range list */
352 unsigned int chanlist_len;
354 sampl_t *data; /* data list, size depends on subd flags */
355 unsigned int data_len;
358 struct comedi_chaninfo_struct{
360 lsampl_t *maxdata_list;
361 unsigned int *flaglist;
362 unsigned int *rangelist;
363 unsigned int unused[4];
366 struct comedi_rangeinfo_struct{
367 unsigned int range_type;
371 struct comedi_krange_struct{
372 int min; /* fixed point, multiply by 1e-6 */
373 int max; /* fixed point, multiply by 1e-6 */
377 struct comedi_subdinfo_struct{
380 unsigned int subd_flags;
381 unsigned int timer_type;
382 unsigned int len_chanlist;
384 unsigned int flags; /* channel flags */
385 unsigned int range_type; /* lookup in kernel */
386 unsigned int settling_time_0;
387 unsigned int unused[9];
390 struct comedi_devinfo_struct{
391 unsigned int version_code;
392 unsigned int n_subdevs;
393 char driver_name[COMEDI_NAMELEN];
394 char board_name[COMEDI_NAMELEN];
400 struct comedi_devconfig_struct{
401 char board_name[COMEDI_NAMELEN];
402 int options[COMEDI_NDEVCONFOPTS];
405 struct comedi_bufconfig_struct{
406 unsigned int subdevice;
409 unsigned int maximum_size;
412 unsigned int unused[4];
415 struct comedi_bufinfo_struct{
416 unsigned int subdevice;
417 unsigned int bytes_read;
419 unsigned int buf_write_ptr;
420 unsigned int buf_read_ptr;
421 unsigned int buf_write_count;
422 unsigned int buf_read_count;
424 unsigned int bytes_written;
426 unsigned int unused[4];
431 #define __RANGE(a,b) ((((a)&0xffff)<<16)|((b)&0xffff))
433 #define RANGE_OFFSET(a) (((a)>>16)&0xffff)
434 #define RANGE_LENGTH(b) ((b)&0xffff)
436 #define RF_UNIT(flags) ((flags)&0xff)
437 #define RF_EXTERNAL (1<<8)
443 #define COMEDI_MIN_SPEED ((unsigned int)0xffffffff)
446 /* only relevant to kernel modules. */
448 #define COMEDI_CB_EOS 1 /* end of scan */
449 #define COMEDI_CB_EOA 2 /* end of acquisition */
450 #define COMEDI_CB_BLOCK 4 /* DEPRECATED: convenient block size */
451 #define COMEDI_CB_EOBUF 8 /* DEPRECATED: end of buffer */
452 #define COMEDI_CB_ERROR 16 /* card error during acquisition */
453 #define COMEDI_CB_OVERFLOW 32 /* buffer overflow/underflow */
455 /**********************************************************/
456 /* everything after this line is ALPHA */
457 /**********************************************************/
460 Added by Klaas Gadeyne after implementation of driver for comedi NI
463 <http://people.mech.kuleuven.ac.be/~kgadeyne/linux/> for more
464 information about their use
473 // When to take into account the indexpulse:
474 #define GPCT_IndexPhaseHighHigh 0
475 #define GPCT_IndexPhaseLowHigh 1
476 #define GPCT_IndexPhaseLowLow 2
477 #define GPCT_IndexPhaseHighLow 3
478 // Reset when index pulse arrives?
479 #define GPCT_RESET_COUNTER_ON_INDEX 1
482 8254 specific configuration.
484 It supports two config commands:
486 0 ID: INSN_CONFIG_SET_COUNTER_MODE
488 I8254_MODE0, I8254_MODE1, ..., I8254_MODE5
490 I8254_BCD, I8254_BINARY
492 0 ID: INSN_CONFIG_8254_READ_STATUS
493 1 <-- Status byte returned here.
502 I8254_MODE0 = (0<<1), /* Interrupt on terminal count */
503 I8254_MODE1 = (1<<1), /* Hardware retriggerable one-shot */
504 I8254_MODE2 = (2<<1), /* Rate generator */
505 I8254_MODE3 = (3<<1), /* Square wave mode */
506 I8254_MODE4 = (4<<1), /* Software triggered strobe */
507 I8254_MODE5 = (5<<1), /* Hardware triggered strobe (retriggerable) */
508 I8254_BCD = 1, /* use binary-coded decimal instead of binary (pretty useless) */
512 /* mode bits for NI general-purpose counters, set with INSN_CONFIG_SET_COUNTER_MODE */
513 #define NI_GPCT_COUNTING_MODE_SHIFT 16
514 #define NI_GPCT_INDEX_PHASE_BITSHIFT 20
515 #define NI_GPCT_COUNTING_DIRECTION_SHIFT 24
516 enum ni_gpct_mode_bits
518 NI_GPCT_GATE_ON_BOTH_EDGES_BIT = 0x4,
519 NI_GPCT_EDGE_GATE_MODE_MASK = 0x18,
520 NI_GPCT_EDGE_GATE_STARTS_STOPS_BITS = 0x0,
521 NI_GPCT_EDGE_GATE_STOPS_STARTS_BITS = 0x8,
522 NI_GPCT_EDGE_GATE_STARTS_BITS = 0x10,
523 NI_GPCT_EDGE_GATE_NO_STARTS_NO_STOPS_BITS = 0x18,
524 NI_GPCT_STOP_MODE_MASK = 0x60,
525 NI_GPCT_STOP_ON_GATE_BITS = 0x00,
526 NI_GPCT_STOP_ON_GATE_OR_TC_BITS = 0x20,
527 NI_GPCT_STOP_ON_GATE_OR_SECOND_TC_BITS = 0x40,
528 NI_GPCT_LOAD_B_SELECT_BIT = 0x80,
529 NI_GPCT_OUTPUT_MODE_MASK = 0x300,
530 NI_GPCT_OUTPUT_TC_PULSE_BITS = 0x100,
531 NI_GPCT_OUTPUT_TC_TOGGLE_BITS = 0x200,
532 NI_GPCT_OUTPUT_TC_OR_GATE_TOGGLE_BITS = 0x300,
533 NI_GPCT_HARDWARE_DISARM_MASK = 0xc00,
534 NI_GPCT_NO_HARDWARE_DISARM_BITS = 0x000,
535 NI_GPCT_DISARM_AT_TC_BITS = 0x400,
536 NI_GPCT_DISARM_AT_GATE_BITS = 0x800,
537 NI_GPCT_DISARM_AT_TC_OR_GATE_BITS = 0xc00,
538 NI_GPCT_LOADING_ON_TC_BIT = 0x1000,
539 NI_GPCT_LOADING_ON_GATE_BIT = 0x4000,
540 NI_GPCT_COUNTING_MODE_MASK = 0x7 << NI_GPCT_COUNTING_MODE_SHIFT,
541 NI_GPCT_COUNTING_MODE_NORMAL_BITS = 0x0 << NI_GPCT_COUNTING_MODE_SHIFT,
542 NI_GPCT_COUNTING_MODE_QUADRATURE_X1_BITS = 0x1 << NI_GPCT_COUNTING_MODE_SHIFT,
543 NI_GPCT_COUNTING_MODE_QUADRATURE_X2_BITS = 0x2 << NI_GPCT_COUNTING_MODE_SHIFT,
544 NI_GPCT_COUNTING_MODE_QUADRATURE_X4_BITS = 0x3 << NI_GPCT_COUNTING_MODE_SHIFT,
545 NI_GPCT_COUNTING_MODE_TWO_PULSE_BITS = 0x4 << NI_GPCT_COUNTING_MODE_SHIFT,
546 NI_GPCT_COUNTING_MODE_SYNC_SOURCE_BITS = 0x6 << NI_GPCT_COUNTING_MODE_SHIFT,
547 NI_GPCT_INDEX_PHASE_MASK = 0x3 << NI_GPCT_INDEX_PHASE_BITSHIFT,
548 NI_GPCT_INDEX_PHASE_LOW_A_LOW_B_BITS = 0x0 << NI_GPCT_INDEX_PHASE_BITSHIFT,
549 NI_GPCT_INDEX_PHASE_LOW_A_HIGH_B_BITS = 0x1 << NI_GPCT_INDEX_PHASE_BITSHIFT,
550 NI_GPCT_INDEX_PHASE_HIGH_A_LOW_B_BITS = 0x2 << NI_GPCT_INDEX_PHASE_BITSHIFT,
551 NI_GPCT_INDEX_PHASE_HIGH_A_HIGH_B_BITS = 0x3 << NI_GPCT_INDEX_PHASE_BITSHIFT,
552 NI_GPCT_INDEX_ENABLE_BIT = 0x400000,
553 NI_GPCT_COUNTING_DIRECTION_MASK = 0x3 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
554 NI_GPCT_COUNTING_DIRECTION_DOWN_BITS = 0x00 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
555 NI_GPCT_COUNTING_DIRECTION_UP_BITS = 0x1 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
556 NI_GPCT_COUNTING_DIRECTION_HW_UP_DOWN_BITS = 0x2 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
557 NI_GPCT_COUNTING_DIRECTION_HW_GATE_BITS = 0x3 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
558 NI_GPCT_RELOAD_SOURCE_MASK = 0xc000000,
559 NI_GPCT_RELOAD_SOURCE_FIXED_BITS = 0x0,
560 NI_GPCT_RELOAD_SOURCE_SWITCHING_BITS = 0x4000000,
561 NI_GPCT_RELOAD_SOURCE_GATE_SELECT_BITS = 0x8000000,
562 NI_GPCT_OR_GATE_BIT = 0x10000000,
563 NI_GPCT_INVERT_OUTPUT_BIT = 0x20000000
566 /* Bits for setting a clock source with
567 * INSN_CONFIG_SET_CLOCK_SRC when using NI general-purpose counters. */
568 enum ni_gpct_clock_source_bits
570 NI_GPCT_CLOCK_SRC_SELECT_MASK = 0x1f,
571 NI_GPCT_TIMEBASE_1_CLOCK_SRC_BITS = 0x0,
572 NI_GPCT_TIMEBASE_2_CLOCK_SRC_BITS = 0x1,
573 NI_GPCT_TIMEBASE_3_CLOCK_SRC_BITS = 0x2,
574 NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS = 0x3,
575 NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS = 0x4,
576 NI_GPCT_NEXT_TC_CLOCK_SRC_BITS = 0x5,
577 NI_GPCT_SOURCE_PIN_i_CLOCK_SRC_BITS = 0x6, /* NI 660x-specific */
578 NI_GPCT_PXI10_CLOCK_SRC_BITS = 0x7,
579 NI_GPCT_PXI_STAR_TRIGGER_CLOCK_SRC_BITS = 0x8,
580 NI_GPCT_ANALOG_TRIGGER_OUT_CLOCK_SRC_BITS = 0x9,
581 NI_GPCT_PRESCALE_MODE_CLOCK_SRC_MASK = 0x30000000,
582 NI_GPCT_NO_PRESCALE_CLOCK_SRC_BITS = 0x0,
583 NI_GPCT_PRESCALE_X2_CLOCK_SRC_BITS = 0x10000000, /* divide source by 2 */
584 NI_GPCT_PRESCALE_X8_CLOCK_SRC_BITS = 0x20000000, /* divide source by 8 */
585 NI_GPCT_INVERT_CLOCK_SRC_BIT = 0x80000000
587 static inline unsigned NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(unsigned n) /* NI 660x-specific */
591 static inline unsigned NI_GPCT_RTSI_CLOCK_SRC_BITS(unsigned n)
595 static inline unsigned NI_GPCT_PFI_CLOCK_SRC_BITS(unsigned n) /* no pfi on NI 660x */
600 /* Possibilities for setting a gate source with
601 INSN_CONFIG_SET_GATE_SRC when using NI general-purpose counters.
602 May be bitwise-or'd with CR_EDGE or CR_INVERT. */
603 enum ni_gpct_gate_select
606 NI_GPCT_AI_START2_GATE_SELECT = 0x12,
607 NI_GPCT_PXI_STAR_TRIGGER_GATE_SELECT = 0x13,
608 NI_GPCT_NEXT_OUT_GATE_SELECT = 0x14,
609 NI_GPCT_AI_START1_GATE_SELECT = 0x1c,
610 NI_GPCT_NEXT_SOURCE_GATE_SELECT = 0x1d,
611 NI_GPCT_ANALOG_TRIGGER_OUT_GATE_SELECT = 0x1e,
612 NI_GPCT_LOGIC_LOW_GATE_SELECT = 0x1f,
613 /* more gates for 660x */
614 NI_GPCT_SOURCE_PIN_i_GATE_SELECT = 0x100,
615 NI_GPCT_GATE_PIN_i_GATE_SELECT = 0x101,
616 /* more gates for 660x "second gate" */
617 NI_GPCT_UP_DOWN_PIN_i_GATE_SELECT = 0x201,
618 NI_GPCT_SELECTED_GATE_GATE_SELECT = 0x21e,
619 /* m-series "second gate" sources are unknown */
620 NI_GPCT_DISABLED_GATE_SELECT = 0x10000,
622 static inline unsigned NI_GPCT_GATE_PIN_GATE_SELECT(unsigned n)
626 static inline unsigned NI_GPCT_RTSI_GATE_SELECT(unsigned n)
633 static inline unsigned NI_GPCT_PFI_GATE_SELECT(unsigned n)
640 static inline unsigned NI_GPCT_UP_DOWN_PIN_GATE_SELECT(unsigned n)
645 /* start sources for ni general-purpose counters for use with
647 enum ni_gpct_arm_source
649 NI_GPCT_ARM_IMMEDIATE = 0x0,
650 NI_GPCT_ARM_PAIRED_IMMEDIATE = 0x1, /* Start both the counter and the adjacent paired counter simultaneously */
651 /* NI doesn't document bits for selecting hardware arm triggers. If
652 the NI_GPCT_ARM_UNKNOWN bit is set, we will pass the least significant
653 bits (3 bits for 660x or 5 bits for m-series) through to the hardware.
654 This will at least allow someone to figure out what the bits do later.*/
655 NI_GPCT_ARM_UNKNOWN = 0x1000,
658 /* master clock sources for ni mio boards and INSN_CONFIG_SET_CLOCK_SRC */
659 enum ni_mio_clock_source
661 NI_MIO_INTERNAL_CLOCK = 0,
662 NI_MIO_RTSI_CLOCK = 1, /* doesn't work for m-series, use NI_MIO_PLL_RTSI_CLOCK() */
663 /* the NI_MIO_PLL_* sources are m-series only */
664 NI_MIO_PLL_PXI_STAR_TRIGGER_CLOCK = 2,
665 NI_MIO_PLL_PXI10_CLOCK = 3,
666 NI_MIO_PLL_RTSI0_CLOCK = 4
668 static inline unsigned NI_MIO_PLL_RTSI_CLOCK(unsigned rtsi_channel)
670 return NI_MIO_PLL_RTSI0_CLOCK + rtsi_channel;
673 /* Signals which can be routed to an NI RTSI pin with INSN_CONFIG_SET_ROUTING.
674 The numbers assigned are not arbitrary, they correspond to the bits required
675 to program the board. */
678 NI_RTSI_OUTPUT_ADR_START1 = 0,
679 NI_RTSI_OUTPUT_ADR_START2 = 1,
680 NI_RTSI_OUTPUT_SCLKG = 2,
681 NI_RTSI_OUTPUT_DACUPDN = 3,
682 NI_RTSI_OUTPUT_DA_START1 = 4,
683 NI_RTSI_OUTPUT_G_SRC0 = 5,
684 NI_RTSI_OUTPUT_G_GATE0 = 6,
685 NI_RTSI_OUTPUT_RGOUT0 = 7,
686 NI_RTSI_OUTPUT_RTSI_BRD_0 = 8,
687 NI_RTSI_OUTPUT_RTSI_OSC = 12 /* pre-m-series always have RTSI clock on line 7 */
689 static inline unsigned NI_RTSI_OUTPUT_RTSI_BRD(unsigned n)
691 return NI_RTSI_OUTPUT_RTSI_BRD_0 + n;
694 /* Signals which can be routed to an NI PFI pin on an m-series board
695 with INSN_CONFIG_SET_ROUTING. These numbers are also returned
696 by INSN_CONFIG_GET_ROUTING on pre-m-series boards, even though
697 their routing cannot be changed. The numbers assigned are
698 not arbitrary, they correspond to the bits required
699 to program the board. */
702 NI_PFI_OUTPUT_PFI_DEFAULT = 0,
703 NI_PFI_OUTPUT_AI_START1 = 1,
704 NI_PFI_OUTPUT_AI_START2 = 2,
705 NI_PFI_OUTPUT_AI_CONVERT = 3,
706 NI_PFI_OUTPUT_G_SRC1 = 4,
707 NI_PFI_OUTPUT_G_GATE1 = 5,
708 NI_PFI_OUTPUT_AO_UPDATE_N = 6,
709 NI_PFI_OUTPUT_AO_START1 = 7,
710 NI_PFI_OUTPUT_AI_START_PULSE = 8,
711 NI_PFI_OUTPUT_G_SRC0 = 9,
712 NI_PFI_OUTPUT_G_GATE0 = 10,
713 NI_PFI_OUTPUT_EXT_STROBE = 11,
714 NI_PFI_OUTPUT_AI_EXT_MUX_CLK = 12,
715 NI_PFI_OUTPUT_GOUT0 = 13,
716 NI_PFI_OUTPUT_GOUT1 = 14,
717 NI_PFI_OUTPUT_FREQ_OUT = 15,
718 NI_PFI_OUTPUT_PFI_DO = 16,
719 NI_PFI_OUTPUT_I_ATRIG = 17,
720 NI_PFI_OUTPUT_RTSI0 = 18,
721 NI_PFI_OUTPUT_PXI_STAR_TRIGGER_IN = 26,
722 NI_PFI_OUTPUT_SCXI_TRIG1 = 27,
723 NI_PFI_OUTPUT_DIO_CHANGE_DETECT_RTSI = 28,
724 NI_PFI_OUTPUT_CDI_SAMPLE = 29,
725 NI_PFI_OUTPUT_CDO_UPDATE = 30
727 static inline unsigned NI_PFI_OUTPUT_RTSI(unsigned rtsi_channel)
729 return NI_PFI_OUTPUT_RTSI0 + rtsi_channel;
732 /* NI External Trigger lines. These values are not arbitrary, but are related to
733 the bits required to program the board (offset by 1 for historical reasons). */
734 static inline unsigned NI_EXT_PFI(unsigned pfi_channel)
736 if(pfi_channel < 10) return pfi_channel;
737 else return pfi_channel + 10;
739 static inline unsigned NI_EXT_RTSI(unsigned rtsi_channel)
741 if(rtsi_channel < 7) return 10 + rtsi_channel;
742 else return 19 + rtsi_channel;
745 /* status bits for INSN_CONFIG_GET_COUNTER_STATUS */
746 enum comedi_counter_status_flags
748 COMEDI_COUNTER_ARMED = 0x1,
749 COMEDI_COUNTER_COUNTING = 0x2,
750 COMEDI_COUNTER_TERMINAL_COUNT = 0x4,
757 #endif /* _COMEDI_H */