1 # Copyright (C) 2011-2012 W. Trevor King <wking@tremily.us>
3 # This file is part of pycomedi.
5 # pycomedi is free software: you can redistribute it and/or modify it under the
6 # terms of the GNU General Public License as published by the Free Software
7 # Foundation, either version 2 of the License, or (at your option) any later
10 # pycomedi is distributed in the hope that it will be useful, but WITHOUT ANY
11 # WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
12 # A PARTICULAR PURPOSE. See the GNU General Public License for more details.
14 # You should have received a copy of the GNU General Public License along with
15 # pycomedi. If not, see <http://www.gnu.org/licenses/>.
17 "Cython interface to comedi.h"
20 cdef extern from 'comedi.h':
21 # From http://docs.cython.org/src/userguide/external_C_code.html
22 # If the header file uses macros to define constants, translate
23 # them into a dummy enum declaration.
25 #"comedi's major device number"
28 #"""maximum number of minor devices.
30 #This can be increased, although kernel structures are currently
31 #statically allocated, thus you don't want this to be much more
32 #than you actually use.
35 enum: COMEDI_NDEVCONFOPTS
36 #"number of config options in the config structure"
38 # length of nth chunk of firmware data
39 enum: COMEDI_DEVCONF_AUX_DATA3_LENGTH
40 enum: COMEDI_DEVCONF_AUX_DATA2_LENGTH
41 enum: COMEDI_DEVCONF_AUX_DATA1_LENGTH
42 enum: COMEDI_DEVCONF_AUX_DATA0_LENGTH
43 enum: COMEDI_DEVCONF_AUX_DATA_HI
44 #"most significant 32 bits of pointer address (if needed)"
45 enum: COMEDI_DEVCONF_AUX_DATA_LO
46 #"least significant 32 bits of pointer address"
47 enum: COMEDI_DEVCONF_AUX_DATA_LENGTH
51 #"max length of device and driver names"
53 ctypedef unsigned int lsampl_t
54 ctypedef unsigned short sampl_t
56 # CR_PACK and CR_PACK_FLAGS replaced by .chanspec.Chanspec
67 #"analog ref = analog ground"
69 #"analog ref = analog common"
71 #"analog ref = differential"
73 #"analog ref = other (undefined)"
75 # /* counters -- these are arbitrary values */
76 # enum: GPCT_RESET 0x0001
77 # enum: GPCT_SET_SOURCE 0x0002
78 # enum: GPCT_SET_GATE 0x0004
79 # enum: GPCT_SET_DIRECTION 0x0008
80 # enum: GPCT_SET_OPERATION 0x0010
81 # enum: GPCT_ARM 0x0020
82 # enum: GPCT_DISARM 0x0040
83 # enum: GPCT_GET_INT_CLK_FRQ 0x0080
85 # enum: GPCT_INT_CLOCK 0x0001
86 # enum: GPCT_EXT_PIN 0x0002
87 # enum: GPCT_NO_GATE 0x0004
88 # enum: GPCT_UP 0x0008
89 # enum: GPCT_DOWN 0x0010
90 # enum: GPCT_HWUD 0x0020
91 # enum: GPCT_SIMPLE_EVENT 0x0040
92 # enum: GPCT_SINGLE_PERIOD 0x0080
93 # enum: GPCT_SINGLE_PW 0x0100
94 # enum: GPCT_CONT_PULSE_OUT 0x0200
95 # enum: GPCT_SINGLE_PULSE_OUT 0x0400
99 # enum: INSN_MASK_WRITE 0x8000000
100 # enum: INSN_MASK_READ 0x4000000
101 # enum: INSN_MASK_SPECIAL 0x2000000
103 # enum: INSN_READ ( 0 | INSN_MASK_READ)
104 # enum: INSN_WRITE ( 1 | INSN_MASK_WRITE)
105 # enum: INSN_BITS ( 2 | INSN_MASK_READ|INSN_MASK_WRITE)
106 # enum: INSN_CONFIG ( 3 | INSN_MASK_READ|INSN_MASK_WRITE)
107 # enum: INSN_GTOD ( 4 | INSN_MASK_READ|INSN_MASK_SPECIAL)
108 # enum: INSN_WAIT ( 5 | INSN_MASK_WRITE|INSN_MASK_SPECIAL)
109 # enum: INSN_INTTRIG ( 6 | INSN_MASK_WRITE|INSN_MASK_SPECIAL)
111 # /* trigger flags */
112 # /* These flags are used in comedi_trig structures */
114 # enum: TRIG_BOGUS 0x0001 /* do the motions */
115 # enum: TRIG_DITHER 0x0002 /* enable dithering */
116 # enum: TRIG_DEGLITCH 0x0004 /* enable deglitching */
117 # //enum: TRIG_RT 0x0008 /* perform op in real time */
118 # enum: TRIG_CONFIG 0x0010 /* perform configuration, not triggering */
119 # enum: TRIG_WAKE_EOS 0x0020 /* wake up on end-of-scan events */
120 # //enum: TRIG_WRITE 0x0040 /* write to bidirectional devices */
122 # /* command flags */
123 # /* These flags are used in comedi_cmd structures */
125 # enum: CMDF_PRIORITY 0x00000008 /* try to use a real-time interrupt while performing command */
127 # enum: TRIG_RT CMDF_PRIORITY /* compatibility definition */
129 # enum: CMDF_WRITE 0x00000040
130 # enum: TRIG_WRITE CMDF_WRITE /* compatibility definition */
132 # enum: CMDF_RAWDATA 0x00000080
134 # enum: COMEDI_EV_START 0x00040000
135 # enum: COMEDI_EV_SCAN_BEGIN 0x00080000
136 # enum: COMEDI_EV_CONVERT 0x00100000
137 # enum: COMEDI_EV_SCAN_END 0x00200000
138 # enum: COMEDI_EV_STOP 0x00400000
140 # enum: TRIG_ROUND_MASK 0x00030000
141 # enum: TRIG_ROUND_NEAREST 0x00000000
142 # enum: TRIG_ROUND_DOWN 0x00010000
143 # enum: TRIG_ROUND_UP 0x00020000
144 # enum: TRIG_ROUND_UP_NEXT 0x00030000
146 # /* trigger sources */
148 # enum: TRIG_ANY 0xffffffff
149 # enum: TRIG_INVALID 0x00000000
151 # enum: TRIG_NONE 0x00000001 /* never trigger */
152 # enum: TRIG_NOW 0x00000002 /* trigger now + N ns */
153 # enum: TRIG_FOLLOW 0x00000004 /* trigger on next lower level trig */
154 # enum: TRIG_TIME 0x00000008 /* trigger at time N ns */
155 # enum: TRIG_TIMER 0x00000010 /* trigger at rate N ns */
156 # enum: TRIG_COUNT 0x00000020 /* trigger when count reaches N */
157 # enum: TRIG_EXT 0x00000040 /* trigger on external signal N */
158 # enum: TRIG_INT 0x00000080 /* trigger on comedi-internal signal N */
159 # enum: TRIG_OTHER 0x00000100 /* driver defined */
161 # /* subdevice flags */
163 # enum: SDF_BUSY 0x0001 /* device is busy */
164 # enum: SDF_BUSY_OWNER 0x0002 /* device is busy with your job */
165 # enum: SDF_LOCKED 0x0004 /* subdevice is locked */
166 # enum: SDF_LOCK_OWNER 0x0008 /* you own lock */
167 # enum: SDF_MAXDATA 0x0010 /* maxdata depends on channel */
168 # enum: SDF_FLAGS 0x0020 /* flags depend on channel */
169 # enum: SDF_RANGETYPE 0x0040 /* range type depends on channel */
170 # enum: SDF_MODE0 0x0080 /* can do mode 0 */
171 # enum: SDF_MODE1 0x0100 /* can do mode 1 */
172 # enum: SDF_MODE2 0x0200 /* can do mode 2 */
173 # enum: SDF_MODE3 0x0400 /* can do mode 3 */
174 # enum: SDF_MODE4 0x0800 /* can do mode 4 */
175 # enum: SDF_CMD 0x1000 /* can do commands (deprecated) */
176 # enum: SDF_SOFT_CALIBRATED 0x2000 /* subdevice uses software calibration */
177 # enum: SDF_CMD_WRITE 0x4000 /* can do output commands */
178 # enum: SDF_CMD_READ 0x8000 /* can do input commands */
180 # enum: SDF_READABLE 0x00010000 /* subdevice can be read (e.g. analog input) */
181 # enum: SDF_WRITABLE 0x00020000 /* subdevice can be written (e.g. analog output) */
182 # enum: SDF_WRITEABLE SDF_WRITABLE /* spelling error in API */
183 # enum: SDF_INTERNAL 0x00040000 /* subdevice does not have externally visible lines */
184 # enum: SDF_RT 0x00080000 /* DEPRECATED: subdevice is RT capable */
185 # enum: SDF_GROUND 0x00100000 /* can do aref=ground */
186 # enum: SDF_COMMON 0x00200000 /* can do aref=common */
187 # enum: SDF_DIFF 0x00400000 /* can do aref=diff */
188 # enum: SDF_OTHER 0x00800000 /* can do aref=other */
189 # enum: SDF_DITHER 0x01000000 /* can do dithering */
190 # enum: SDF_DEGLITCH 0x02000000 /* can do deglitching */
191 # enum: SDF_MMAP 0x04000000 /* can do mmap() */
192 # enum: SDF_RUNNING 0x08000000 /* subdevice is acquiring data */
193 # enum: SDF_LSAMPL 0x10000000 /* subdevice uses 32-bit samples */
194 # enum: SDF_PACKED 0x20000000 /* subdevice can do packed DIO */
195 # /* re recyle these flags for PWM */
196 # enum: SDF_PWM_COUNTER SDF_MODE0 /* PWM can automatically switch off */
197 # enum: SDF_PWM_HBRIDGE SDF_MODE1 /* PWM is signed (H-bridge) */
201 # /* subdevice types */
203 enum comedi_subdevice_type:
204 COMEDI_SUBD_UNUSED, # unused by driver
205 COMEDI_SUBD_AI, # analog input
206 COMEDI_SUBD_AO, # analog output
207 COMEDI_SUBD_DI, # digital input
208 COMEDI_SUBD_DO, # digital output
209 COMEDI_SUBD_DIO, # digital input/output
210 COMEDI_SUBD_COUNTER, # counter
211 COMEDI_SUBD_TIMER, # timer
212 COMEDI_SUBD_MEMORY, # memory, EEPROM, DPRAM
213 COMEDI_SUBD_CALIB, # calibration DACs
214 COMEDI_SUBD_PROC, # processor, DSP
215 COMEDI_SUBD_SERIAL, # serial IO
216 COMEDI_SUBD_PWM # PWM
218 # /* configuration instructions */
220 # enum configuration_ids {
221 # INSN_CONFIG_DIO_INPUT = 0,
222 # INSN_CONFIG_DIO_OUTPUT = 1,
223 # INSN_CONFIG_DIO_OPENDRAIN = 2,
224 # INSN_CONFIG_ANALOG_TRIG = 16,
225 # // INSN_CONFIG_WAVEFORM = 17,
226 # // INSN_CONFIG_TRIG = 18,
227 # // INSN_CONFIG_COUNTER = 19,
228 # INSN_CONFIG_ALT_SOURCE = 20,
229 # INSN_CONFIG_DIGITAL_TRIG = 21,
230 # INSN_CONFIG_BLOCK_SIZE = 22,
231 # INSN_CONFIG_TIMER_1 = 23,
232 # INSN_CONFIG_FILTER = 24,
233 # INSN_CONFIG_CHANGE_NOTIFY = 25,
235 # /*ALPHA*/ INSN_CONFIG_SERIAL_CLOCK = 26,
236 # INSN_CONFIG_BIDIRECTIONAL_DATA = 27,
237 # INSN_CONFIG_DIO_QUERY = 28,
238 # INSN_CONFIG_PWM_OUTPUT = 29,
239 # INSN_CONFIG_GET_PWM_OUTPUT = 30,
240 # INSN_CONFIG_ARM = 31,
241 # INSN_CONFIG_DISARM = 32,
242 # INSN_CONFIG_GET_COUNTER_STATUS = 33,
243 # INSN_CONFIG_RESET = 34,
244 # INSN_CONFIG_GPCT_SINGLE_PULSE_GENERATOR = 1001, // Use CTR as single pulsegenerator
245 # INSN_CONFIG_GPCT_PULSE_TRAIN_GENERATOR = 1002, // Use CTR as pulsetraingenerator
246 # INSN_CONFIG_GPCT_QUADRATURE_ENCODER = 1003, // Use the counter as encoder
247 # INSN_CONFIG_SET_GATE_SRC = 2001, // Set gate source
248 # INSN_CONFIG_GET_GATE_SRC = 2002, // Get gate source
249 # INSN_CONFIG_SET_CLOCK_SRC = 2003, // Set master clock source
250 # INSN_CONFIG_GET_CLOCK_SRC = 2004, // Get master clock source
251 # INSN_CONFIG_SET_OTHER_SRC = 2005, // Set other source
252 # // INSN_CONFIG_GET_OTHER_SRC = 2006, // Get other source
253 # INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE = 2006, // Get size in bytes of subdevice's on-board fifos used during streaming input/output
254 # INSN_CONFIG_SET_COUNTER_MODE = 4097,
255 # INSN_CONFIG_8254_SET_MODE = INSN_CONFIG_SET_COUNTER_MODE, /* deprecated */
256 # INSN_CONFIG_8254_READ_STATUS = 4098,
257 # INSN_CONFIG_SET_ROUTING = 4099,
258 # INSN_CONFIG_GET_ROUTING = 4109,
260 # INSN_CONFIG_PWM_SET_PERIOD = 5000, /* sets frequency */
261 # INSN_CONFIG_PWM_GET_PERIOD = 5001, /* gets frequency */
262 # INSN_CONFIG_GET_PWM_STATUS = 5002, /* is it running? */
263 # INSN_CONFIG_PWM_SET_H_BRIDGE = 5003, /* sets H bridge: duty cycle and sign bit for a relay at the same time*/
264 # INSN_CONFIG_PWM_GET_H_BRIDGE = 5004 /* gets H bridge data: duty cycle and the sign bit */
267 # enum comedi_io_direction {
270 # COMEDI_OPENDRAIN = 2
273 # enum comedi_support_level
275 # COMEDI_UNKNOWN_SUPPORT = 0,
283 # enum: COMEDI_DEVCONFIG _IOW(CIO,0,comedi_devconfig)
284 # enum: COMEDI_DEVINFO _IOR(CIO,1,comedi_devinfo)
285 # enum: COMEDI_SUBDINFO _IOR(CIO,2,comedi_subdinfo)
286 # enum: COMEDI_CHANINFO _IOR(CIO,3,comedi_chaninfo)
287 # enum: COMEDI_TRIG _IOWR(CIO,4,comedi_trig)
288 # enum: COMEDI_LOCK _IO(CIO,5)
289 # enum: COMEDI_UNLOCK _IO(CIO,6)
290 # enum: COMEDI_CANCEL _IO(CIO,7)
291 # enum: COMEDI_RANGEINFO _IOR(CIO,8,comedi_rangeinfo)
292 # enum: COMEDI_CMD _IOR(CIO,9,comedi_cmd)
293 # enum: COMEDI_CMDTEST _IOR(CIO,10,comedi_cmd)
294 # enum: COMEDI_INSNLIST _IOR(CIO,11,comedi_insnlist)
295 # enum: COMEDI_INSN _IOR(CIO,12,comedi_insn)
296 # enum: COMEDI_BUFCONFIG _IOR(CIO,13,comedi_bufconfig)
297 # enum: COMEDI_BUFINFO _IOWR(CIO,14,comedi_bufinfo)
298 # enum: COMEDI_POLL _IO(CIO,15)
302 ctypedef struct comedi_cmd:
305 unsigned int start_src
306 unsigned int start_arg
307 unsigned int scan_begin_src
308 unsigned int scan_begin_arg
309 unsigned int convert_src
310 unsigned int convert_arg
311 unsigned int scan_end_src
312 unsigned int scan_end_arg
313 unsigned int stop_src
314 unsigned int stop_arg
315 unsigned int *chanlist # channel/range list
316 unsigned int chanlist_len
317 sampl_t *data # data list, size depends on subd flags
318 unsigned int data_len
320 ctypedef struct comedi_insn:
325 unsigned int chanspec
326 unsigned int unused[3]
328 ctypedef struct comedi_insnlist:
332 ctypedef struct comedi_chaninfo:
334 lsampl_t *maxdata_list
335 unsigned int *flaglist
336 unsigned int *rangelist
337 unsigned int unused[4]
339 ctypedef struct comedi_subdinfo:
342 unsigned int subd_flags
343 unsigned int timer_type
344 unsigned int len_chanlist
346 unsigned int flags # channel flags
347 unsigned int range_type # lookup in kernel
348 unsigned int settling_time_0
349 unsigned insn_bits_support # see support_level enum for values
350 unsigned int unused[8]
352 ctypedef struct comedi_devinfo:
353 unsigned int version_code
354 unsigned int n_subdevs
355 char driver_name[COMEDI_NAMELEN]
356 char board_name[COMEDI_NAMELEN]
361 ctypedef struct comedi_devconfig:
362 char board_name[COMEDI_NAMELEN]
363 int options[COMEDI_NDEVCONFOPTS]
365 ctypedef struct comedi_rangeinfo:
366 unsigned int range_type
369 ctypedef struct comedi_krange:
370 int min # fixed point, multiply by 1e-6
371 int max # fixed point, multiply by 1e-6
374 ctypedef struct comedi_bufconfig:
375 unsigned int subdevice
377 unsigned int maximum_size
379 unsigned int unused[4]
381 ctypedef struct comedi_bufinfo:
382 unsigned int subdevice
383 unsigned int bytes_read
384 unsigned int buf_write_ptr
385 unsigned int buf_read_ptr
386 unsigned int buf_write_count
387 unsigned int buf_read_count
388 unsigned int bytes_written
389 unsigned int unused[4]
392 unsigned int subdev # subdevice
393 unsigned int mode # mode
395 unsigned int n_chan # number of channels
396 unsigned int *chanlist # channel/range list
397 sampl_t *data # data list, size depends on subd flags
398 unsigned int n # number of scans
401 unsigned int trigvar1
402 unsigned int data_len
403 unsigned int unused[3]
407 # enum: __RANGE(a,b) ((((a)&0xffff)<<16)|((b)&0xffff))
409 # enum: RANGE_OFFSET(a) (((a)>>16)&0xffff)
410 # enum: RANGE_LENGTH(b) ((b)&0xffff)
412 # enum: RF_UNIT(flags) ((flags)&0xff)
413 # enum: RF_EXTERNAL (1<<8)
419 # enum: COMEDI_MIN_SPEED ((unsigned int)0xffffffff)
421 # /* callback stuff */
422 # /* only relevant to kernel modules. */
424 # enum: COMEDI_CB_EOS 1 /* end of scan */
425 # enum: COMEDI_CB_EOA 2 /* end of acquisition */
426 # enum: COMEDI_CB_BLOCK 4 /* new data has arrived: wakes up write()/read() */
427 # enum: COMEDI_CB_EOBUF 8 /* DEPRECATED: end of buffer */
428 # enum: COMEDI_CB_ERROR 16 /* card error during acquisition */
429 # enum: COMEDI_CB_OVERFLOW 32 /* buffer overflow/underflow */
431 # /**********************************************************/
432 # /* everything after this line is ALPHA */
433 # /**********************************************************/
436 # 8254 specific configuration.
438 # It supports two config commands:
440 # 0 ID: INSN_CONFIG_SET_COUNTER_MODE
442 # I8254_MODE0, I8254_MODE1, ..., I8254_MODE5
444 # I8254_BCD, I8254_BINARY
446 # 0 ID: INSN_CONFIG_8254_READ_STATUS
447 # 1 <-- Status byte returned here.
450 # B5-B0 Current mode.
455 # I8254_MODE0 = (0 << 1), /* Interrupt on terminal count */
456 # I8254_MODE1 = (1 << 1), /* Hardware retriggerable one-shot */
457 # I8254_MODE2 = (2 << 1), /* Rate generator */
458 # I8254_MODE3 = (3 << 1), /* Square wave mode */
459 # I8254_MODE4 = (4 << 1), /* Software triggered strobe */
460 # I8254_MODE5 = (5 << 1), /* Hardware triggered strobe (retriggerable) */
461 # I8254_BCD = 1, /* use binary-coded decimal instead of binary (pretty useless) */
465 # static inline unsigned NI_USUAL_PFI_SELECT(unsigned pfi_channel) {
466 # if (pfi_channel < 10)
467 # return 0x1 + pfi_channel;
469 # return 0xb + pfi_channel;
470 # } static inline unsigned NI_USUAL_RTSI_SELECT(unsigned rtsi_channel) {
471 # if (rtsi_channel < 7)
472 # return 0xb + rtsi_channel;
476 # /* mode bits for NI general-purpose counters, set with INSN_CONFIG_SET_COUNTER_MODE */
477 # enum: NI_GPCT_COUNTING_MODE_SHIFT 16
478 # enum: NI_GPCT_INDEX_PHASE_BITSHIFT 20
479 # enum: NI_GPCT_COUNTING_DIRECTION_SHIFT 24
480 # enum ni_gpct_mode_bits {
481 # NI_GPCT_GATE_ON_BOTH_EDGES_BIT = 0x4,
482 # NI_GPCT_EDGE_GATE_MODE_MASK = 0x18,
483 # NI_GPCT_EDGE_GATE_STARTS_STOPS_BITS = 0x0,
484 # NI_GPCT_EDGE_GATE_STOPS_STARTS_BITS = 0x8,
485 # NI_GPCT_EDGE_GATE_STARTS_BITS = 0x10,
486 # NI_GPCT_EDGE_GATE_NO_STARTS_NO_STOPS_BITS = 0x18,
487 # NI_GPCT_STOP_MODE_MASK = 0x60,
488 # NI_GPCT_STOP_ON_GATE_BITS = 0x00,
489 # NI_GPCT_STOP_ON_GATE_OR_TC_BITS = 0x20,
490 # NI_GPCT_STOP_ON_GATE_OR_SECOND_TC_BITS = 0x40,
491 # NI_GPCT_LOAD_B_SELECT_BIT = 0x80,
492 # NI_GPCT_OUTPUT_MODE_MASK = 0x300,
493 # NI_GPCT_OUTPUT_TC_PULSE_BITS = 0x100,
494 # NI_GPCT_OUTPUT_TC_TOGGLE_BITS = 0x200,
495 # NI_GPCT_OUTPUT_TC_OR_GATE_TOGGLE_BITS = 0x300,
496 # NI_GPCT_HARDWARE_DISARM_MASK = 0xc00,
497 # NI_GPCT_NO_HARDWARE_DISARM_BITS = 0x000,
498 # NI_GPCT_DISARM_AT_TC_BITS = 0x400,
499 # NI_GPCT_DISARM_AT_GATE_BITS = 0x800,
500 # NI_GPCT_DISARM_AT_TC_OR_GATE_BITS = 0xc00,
501 # NI_GPCT_LOADING_ON_TC_BIT = 0x1000,
502 # NI_GPCT_LOADING_ON_GATE_BIT = 0x4000,
503 # NI_GPCT_COUNTING_MODE_MASK = 0x7 << NI_GPCT_COUNTING_MODE_SHIFT,
504 # NI_GPCT_COUNTING_MODE_NORMAL_BITS =
505 # 0x0 << NI_GPCT_COUNTING_MODE_SHIFT,
506 # NI_GPCT_COUNTING_MODE_QUADRATURE_X1_BITS =
507 # 0x1 << NI_GPCT_COUNTING_MODE_SHIFT,
508 # NI_GPCT_COUNTING_MODE_QUADRATURE_X2_BITS =
509 # 0x2 << NI_GPCT_COUNTING_MODE_SHIFT,
510 # NI_GPCT_COUNTING_MODE_QUADRATURE_X4_BITS =
511 # 0x3 << NI_GPCT_COUNTING_MODE_SHIFT,
512 # NI_GPCT_COUNTING_MODE_TWO_PULSE_BITS =
513 # 0x4 << NI_GPCT_COUNTING_MODE_SHIFT,
514 # NI_GPCT_COUNTING_MODE_SYNC_SOURCE_BITS =
515 # 0x6 << NI_GPCT_COUNTING_MODE_SHIFT,
516 # NI_GPCT_INDEX_PHASE_MASK = 0x3 << NI_GPCT_INDEX_PHASE_BITSHIFT,
517 # NI_GPCT_INDEX_PHASE_LOW_A_LOW_B_BITS =
518 # 0x0 << NI_GPCT_INDEX_PHASE_BITSHIFT,
519 # NI_GPCT_INDEX_PHASE_LOW_A_HIGH_B_BITS =
520 # 0x1 << NI_GPCT_INDEX_PHASE_BITSHIFT,
521 # NI_GPCT_INDEX_PHASE_HIGH_A_LOW_B_BITS =
522 # 0x2 << NI_GPCT_INDEX_PHASE_BITSHIFT,
523 # NI_GPCT_INDEX_PHASE_HIGH_A_HIGH_B_BITS =
524 # 0x3 << NI_GPCT_INDEX_PHASE_BITSHIFT,
525 # NI_GPCT_INDEX_ENABLE_BIT = 0x400000,
526 # NI_GPCT_COUNTING_DIRECTION_MASK =
527 # 0x3 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
528 # NI_GPCT_COUNTING_DIRECTION_DOWN_BITS =
529 # 0x00 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
530 # NI_GPCT_COUNTING_DIRECTION_UP_BITS =
531 # 0x1 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
532 # NI_GPCT_COUNTING_DIRECTION_HW_UP_DOWN_BITS =
533 # 0x2 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
534 # NI_GPCT_COUNTING_DIRECTION_HW_GATE_BITS =
535 # 0x3 << NI_GPCT_COUNTING_DIRECTION_SHIFT,
536 # NI_GPCT_RELOAD_SOURCE_MASK = 0xc000000,
537 # NI_GPCT_RELOAD_SOURCE_FIXED_BITS = 0x0,
538 # NI_GPCT_RELOAD_SOURCE_SWITCHING_BITS = 0x4000000,
539 # NI_GPCT_RELOAD_SOURCE_GATE_SELECT_BITS = 0x8000000,
540 # NI_GPCT_OR_GATE_BIT = 0x10000000,
541 # NI_GPCT_INVERT_OUTPUT_BIT = 0x20000000
544 # /* Bits for setting a clock source with
545 # * INSN_CONFIG_SET_CLOCK_SRC when using NI general-purpose counters. */
546 # enum ni_gpct_clock_source_bits {
547 # NI_GPCT_CLOCK_SRC_SELECT_MASK = 0x3f,
548 # NI_GPCT_TIMEBASE_1_CLOCK_SRC_BITS = 0x0,
549 # NI_GPCT_TIMEBASE_2_CLOCK_SRC_BITS = 0x1,
550 # NI_GPCT_TIMEBASE_3_CLOCK_SRC_BITS = 0x2,
551 # NI_GPCT_LOGIC_LOW_CLOCK_SRC_BITS = 0x3,
552 # NI_GPCT_NEXT_GATE_CLOCK_SRC_BITS = 0x4,
553 # NI_GPCT_NEXT_TC_CLOCK_SRC_BITS = 0x5,
554 # NI_GPCT_SOURCE_PIN_i_CLOCK_SRC_BITS = 0x6, /* NI 660x-specific */
555 # NI_GPCT_PXI10_CLOCK_SRC_BITS = 0x7,
556 # NI_GPCT_PXI_STAR_TRIGGER_CLOCK_SRC_BITS = 0x8,
557 # NI_GPCT_ANALOG_TRIGGER_OUT_CLOCK_SRC_BITS = 0x9,
558 # NI_GPCT_PRESCALE_MODE_CLOCK_SRC_MASK = 0x30000000,
559 # NI_GPCT_NO_PRESCALE_CLOCK_SRC_BITS = 0x0,
560 # NI_GPCT_PRESCALE_X2_CLOCK_SRC_BITS = 0x10000000, /* divide source by 2 */
561 # NI_GPCT_PRESCALE_X8_CLOCK_SRC_BITS = 0x20000000, /* divide source by 8 */
562 # NI_GPCT_INVERT_CLOCK_SRC_BIT = 0x80000000
564 # static inline unsigned NI_GPCT_SOURCE_PIN_CLOCK_SRC_BITS(unsigned n) { /* NI 660x-specific */
567 # static inline unsigned NI_GPCT_RTSI_CLOCK_SRC_BITS(unsigned n) {
570 # static inline unsigned NI_GPCT_PFI_CLOCK_SRC_BITS(unsigned n) { /* no pfi on NI 660x */
574 # /* Possibilities for setting a gate source with
575 # INSN_CONFIG_SET_GATE_SRC when using NI general-purpose counters.
576 # May be bitwise-or'd with CR_EDGE or CR_INVERT. */
577 # enum ni_gpct_gate_select {
578 # /* m-series gates */
579 # NI_GPCT_TIMESTAMP_MUX_GATE_SELECT = 0x0,
580 # NI_GPCT_AI_START2_GATE_SELECT = 0x12,
581 # NI_GPCT_PXI_STAR_TRIGGER_GATE_SELECT = 0x13,
582 # NI_GPCT_NEXT_OUT_GATE_SELECT = 0x14,
583 # NI_GPCT_AI_START1_GATE_SELECT = 0x1c,
584 # NI_GPCT_NEXT_SOURCE_GATE_SELECT = 0x1d,
585 # NI_GPCT_ANALOG_TRIGGER_OUT_GATE_SELECT = 0x1e,
586 # NI_GPCT_LOGIC_LOW_GATE_SELECT = 0x1f,
587 # /* more gates for 660x */
588 # NI_GPCT_SOURCE_PIN_i_GATE_SELECT = 0x100,
589 # NI_GPCT_GATE_PIN_i_GATE_SELECT = 0x101,
590 # /* more gates for 660x "second gate" */
591 # NI_GPCT_UP_DOWN_PIN_i_GATE_SELECT = 0x201,
592 # NI_GPCT_SELECTED_GATE_GATE_SELECT = 0x21e,
593 # /* m-series "second gate" sources are unknown,
594 # we should add them here with an offset of 0x300 when known. */
595 # NI_GPCT_DISABLED_GATE_SELECT = 0x8000,
597 # static inline unsigned NI_GPCT_GATE_PIN_GATE_SELECT(unsigned n) {
600 # static inline unsigned NI_GPCT_RTSI_GATE_SELECT(unsigned n) {
601 # return NI_USUAL_RTSI_SELECT(n);
603 # static inline unsigned NI_GPCT_PFI_GATE_SELECT(unsigned n) {
604 # return NI_USUAL_PFI_SELECT(n);
606 # static inline unsigned NI_GPCT_UP_DOWN_PIN_GATE_SELECT(unsigned n) {
610 # /* Possibilities for setting a source with
611 # INSN_CONFIG_SET_OTHER_SRC when using NI general-purpose counters. */
612 # enum ni_gpct_other_index {
613 # NI_GPCT_SOURCE_ENCODER_A,
614 # NI_GPCT_SOURCE_ENCODER_B,
615 # NI_GPCT_SOURCE_ENCODER_Z
617 # enum ni_gpct_other_select {
618 # /* m-series gates */
619 # // Still unknown, probably only need NI_GPCT_PFI_OTHER_SELECT
620 # NI_GPCT_DISABLED_OTHER_SELECT = 0x8000,
622 # static inline unsigned NI_GPCT_PFI_OTHER_SELECT(unsigned n) {
623 # return NI_USUAL_PFI_SELECT(n);
626 # /* start sources for ni general-purpose counters for use with
628 # enum ni_gpct_arm_source {
629 # NI_GPCT_ARM_IMMEDIATE = 0x0,
630 # NI_GPCT_ARM_PAIRED_IMMEDIATE = 0x1, /* Start both the counter and the adjacent paired counter simultaneously */
631 # /* NI doesn't document bits for selecting hardware arm triggers. If
632 # the NI_GPCT_ARM_UNKNOWN bit is set, we will pass the least significant
633 # bits (3 bits for 660x or 5 bits for m-series) through to the hardware.
634 # This will at least allow someone to figure out what the bits do later. */
635 # NI_GPCT_ARM_UNKNOWN = 0x1000,
638 # /* digital filtering options for ni 660x for use with INSN_CONFIG_FILTER. */
639 # enum ni_gpct_filter_select {
640 # NI_GPCT_FILTER_OFF = 0x0,
641 # NI_GPCT_FILTER_TIMEBASE_3_SYNC = 0x1,
642 # NI_GPCT_FILTER_100x_TIMEBASE_1 = 0x2,
643 # NI_GPCT_FILTER_20x_TIMEBASE_1 = 0x3,
644 # NI_GPCT_FILTER_10x_TIMEBASE_1 = 0x4,
645 # NI_GPCT_FILTER_2x_TIMEBASE_1 = 0x5,
646 # NI_GPCT_FILTER_2x_TIMEBASE_3 = 0x6
649 # /* PFI digital filtering options for ni m-series for use with INSN_CONFIG_FILTER. */
650 # enum ni_pfi_filter_select {
651 # NI_PFI_FILTER_OFF = 0x0,
652 # NI_PFI_FILTER_125ns = 0x1,
653 # NI_PFI_FILTER_6425ns = 0x2,
654 # NI_PFI_FILTER_2550us = 0x3
657 # /* master clock sources for ni mio boards and INSN_CONFIG_SET_CLOCK_SRC */
658 # enum ni_mio_clock_source {
659 # NI_MIO_INTERNAL_CLOCK = 0,
660 # NI_MIO_RTSI_CLOCK = 1, /* doesn't work for m-series, use NI_MIO_PLL_RTSI_CLOCK() */
661 # /* the NI_MIO_PLL_* sources are m-series only */
662 # NI_MIO_PLL_PXI_STAR_TRIGGER_CLOCK = 2,
663 # NI_MIO_PLL_PXI10_CLOCK = 3,
664 # NI_MIO_PLL_RTSI0_CLOCK = 4
666 # static inline unsigned NI_MIO_PLL_RTSI_CLOCK(unsigned rtsi_channel) {
667 # return NI_MIO_PLL_RTSI0_CLOCK + rtsi_channel;
670 # /* Signals which can be routed to an NI RTSI pin with INSN_CONFIG_SET_ROUTING.
671 # The numbers assigned are not arbitrary, they correspond to the bits required
672 # to program the board. */
673 # enum ni_rtsi_routing {
674 # NI_RTSI_OUTPUT_ADR_START1 = 0,
675 # NI_RTSI_OUTPUT_ADR_START2 = 1,
676 # NI_RTSI_OUTPUT_SCLKG = 2,
677 # NI_RTSI_OUTPUT_DACUPDN = 3,
678 # NI_RTSI_OUTPUT_DA_START1 = 4,
679 # NI_RTSI_OUTPUT_G_SRC0 = 5,
680 # NI_RTSI_OUTPUT_G_GATE0 = 6,
681 # NI_RTSI_OUTPUT_RGOUT0 = 7,
682 # NI_RTSI_OUTPUT_RTSI_BRD_0 = 8,
683 # NI_RTSI_OUTPUT_RTSI_OSC = 12 /* pre-m-series always have RTSI clock on line 7 */
685 # static inline unsigned NI_RTSI_OUTPUT_RTSI_BRD(unsigned n) {
686 # return NI_RTSI_OUTPUT_RTSI_BRD_0 + n;
689 # /* Signals which can be routed to an NI PFI pin on an m-series board
690 # with INSN_CONFIG_SET_ROUTING. These numbers are also returned
691 # by INSN_CONFIG_GET_ROUTING on pre-m-series boards, even though
692 # their routing cannot be changed. The numbers assigned are
693 # not arbitrary, they correspond to the bits required
694 # to program the board. */
695 # enum ni_pfi_routing {
696 # NI_PFI_OUTPUT_PFI_DEFAULT = 0,
697 # NI_PFI_OUTPUT_AI_START1 = 1,
698 # NI_PFI_OUTPUT_AI_START2 = 2,
699 # NI_PFI_OUTPUT_AI_CONVERT = 3,
700 # NI_PFI_OUTPUT_G_SRC1 = 4,
701 # NI_PFI_OUTPUT_G_GATE1 = 5,
702 # NI_PFI_OUTPUT_AO_UPDATE_N = 6,
703 # NI_PFI_OUTPUT_AO_START1 = 7,
704 # NI_PFI_OUTPUT_AI_START_PULSE = 8,
705 # NI_PFI_OUTPUT_G_SRC0 = 9,
706 # NI_PFI_OUTPUT_G_GATE0 = 10,
707 # NI_PFI_OUTPUT_EXT_STROBE = 11,
708 # NI_PFI_OUTPUT_AI_EXT_MUX_CLK = 12,
709 # NI_PFI_OUTPUT_GOUT0 = 13,
710 # NI_PFI_OUTPUT_GOUT1 = 14,
711 # NI_PFI_OUTPUT_FREQ_OUT = 15,
712 # NI_PFI_OUTPUT_PFI_DO = 16,
713 # NI_PFI_OUTPUT_I_ATRIG = 17,
714 # NI_PFI_OUTPUT_RTSI0 = 18,
715 # NI_PFI_OUTPUT_PXI_STAR_TRIGGER_IN = 26,
716 # NI_PFI_OUTPUT_SCXI_TRIG1 = 27,
717 # NI_PFI_OUTPUT_DIO_CHANGE_DETECT_RTSI = 28,
718 # NI_PFI_OUTPUT_CDI_SAMPLE = 29,
719 # NI_PFI_OUTPUT_CDO_UPDATE = 30
721 # static inline unsigned NI_PFI_OUTPUT_RTSI(unsigned rtsi_channel) {
722 # return NI_PFI_OUTPUT_RTSI0 + rtsi_channel;
725 # /* Signals which can be routed to output on a NI PFI pin on a 660x board
726 # with INSN_CONFIG_SET_ROUTING. The numbers assigned are
727 # not arbitrary, they correspond to the bits required
728 # to program the board. Lines 0 to 7 can only be set to
729 # NI_660X_PFI_OUTPUT_DIO. Lines 32 to 39 can only be set to
730 # NI_660X_PFI_OUTPUT_COUNTER. */
731 # enum ni_660x_pfi_routing {
732 # NI_660X_PFI_OUTPUT_COUNTER = 1, // counter
733 # NI_660X_PFI_OUTPUT_DIO = 2, // static digital output
736 # /* NI External Trigger lines. These values are not arbitrary, but are related to
737 # the bits required to program the board (offset by 1 for historical reasons). */
738 # static inline unsigned NI_EXT_PFI(unsigned pfi_channel) {
739 # return NI_USUAL_PFI_SELECT(pfi_channel) - 1;
741 # static inline unsigned NI_EXT_RTSI(unsigned rtsi_channel) {
742 # return NI_USUAL_RTSI_SELECT(rtsi_channel) - 1;
745 # /* status bits for INSN_CONFIG_GET_COUNTER_STATUS */
746 # enum comedi_counter_status_flags {
747 # COMEDI_COUNTER_ARMED = 0x1,
748 # COMEDI_COUNTER_COUNTING = 0x2,
749 # COMEDI_COUNTER_TERMINAL_COUNT = 0x4,
752 # /* Clock sources for CDIO subdevice on NI m-series boards.
753 # Used as the scan_begin_arg for a comedi_command. These
754 # sources may also be bitwise-or'd with CR_INVERT to change polarity. */
755 # enum ni_m_series_cdio_scan_begin_src {
756 # NI_CDIO_SCAN_BEGIN_SRC_GROUND = 0,
757 # NI_CDIO_SCAN_BEGIN_SRC_AI_START = 18,
758 # NI_CDIO_SCAN_BEGIN_SRC_AI_CONVERT = 19,
759 # NI_CDIO_SCAN_BEGIN_SRC_PXI_STAR_TRIGGER = 20,
760 # NI_CDIO_SCAN_BEGIN_SRC_G0_OUT = 28,
761 # NI_CDIO_SCAN_BEGIN_SRC_G1_OUT = 29,
762 # NI_CDIO_SCAN_BEGIN_SRC_ANALOG_TRIGGER = 30,
763 # NI_CDIO_SCAN_BEGIN_SRC_AO_UPDATE = 31,
764 # NI_CDIO_SCAN_BEGIN_SRC_FREQ_OUT = 32,
765 # NI_CDIO_SCAN_BEGIN_SRC_DIO_CHANGE_DETECT_IRQ = 33
767 # static inline unsigned NI_CDIO_SCAN_BEGIN_SRC_PFI(unsigned pfi_channel) {
768 # return NI_USUAL_PFI_SELECT(pfi_channel);
770 # static inline unsigned NI_CDIO_SCAN_BEGIN_SRC_RTSI(unsigned
772 # return NI_USUAL_RTSI_SELECT(rtsi_channel);
775 # /* scan_begin_src for scan_begin_arg==TRIG_EXT with analog output command
776 # on NI boards. These scan begin sources can also be bitwise-or'd with
777 # CR_INVERT to change polarity. */
778 # static inline unsigned NI_AO_SCAN_BEGIN_SRC_PFI(unsigned pfi_channel) {
779 # return NI_USUAL_PFI_SELECT(pfi_channel);
781 # static inline unsigned NI_AO_SCAN_BEGIN_SRC_RTSI(unsigned rtsi_channel) {
782 # return NI_USUAL_RTSI_SELECT(rtsi_channel);
785 # /* Bits for setting a clock source with
786 # * INSN_CONFIG_SET_CLOCK_SRC when using NI frequency output subdevice. */
787 # enum ni_freq_out_clock_source_bits {
788 # NI_FREQ_OUT_TIMEBASE_1_DIV_2_CLOCK_SRC, // 10 MHz
789 # NI_FREQ_OUT_TIMEBASE_2_CLOCK_SRC // 100 KHz
792 # /* Values for setting a clock source with INSN_CONFIG_SET_CLOCK_SRC for
793 # * 8254 counter subdevices on Amplicon DIO boards (amplc_dio200 driver). */
794 # enum amplc_dio_clock_source {
795 # AMPLC_DIO_CLK_CLKN, /* per channel external clock
796 # input/output pin (pin is only an
797 # input when clock source set to this
798 # value, otherwise it is an output) */
799 # AMPLC_DIO_CLK_10MHZ, /* 10 MHz internal clock */
800 # AMPLC_DIO_CLK_1MHZ, /* 1 MHz internal clock */
801 # AMPLC_DIO_CLK_100KHZ, /* 100 kHz internal clock */
802 # AMPLC_DIO_CLK_10KHZ, /* 10 kHz internal clock */
803 # AMPLC_DIO_CLK_1KHZ, /* 1 kHz internal clock */
804 # AMPLC_DIO_CLK_OUTNM1, /* output of preceding counter channel
805 # (for channel 0, preceding counter
806 # channel is channel 2 on preceding
807 # counter subdevice, for first counter
808 # subdevice, preceding counter
809 # subdevice is the last counter
811 # AMPLC_DIO_CLK_EXT /* per chip external input pin */
814 # /* Values for setting a gate source with INSN_CONFIG_SET_GATE_SRC for
815 # * 8254 counter subdevices on Amplicon DIO boards (amplc_dio200 driver). */
816 # enum amplc_dio_gate_source {
817 # AMPLC_DIO_GAT_VCC, /* internal high logic level */
818 # AMPLC_DIO_GAT_GND, /* internal low logic level */
819 # AMPLC_DIO_GAT_GATN, /* per channel external gate input */
820 # AMPLC_DIO_GAT_NOUTNM2, /* negated output of counter channel
821 # minus 2 (for channels 0 or 1,
822 # channel minus 2 is channel 1 or 2 on
823 # the preceding counter subdevice, for
824 # the first counter subdevice the
825 # preceding counter subdevice is the
826 # last counter subdevice) */
827 # AMPLC_DIO_GAT_RESERVED4,
828 # AMPLC_DIO_GAT_RESERVED5,
829 # AMPLC_DIO_GAT_RESERVED6,
830 # AMPLC_DIO_GAT_RESERVED7