comedi/drivers/ni_labpc.c

   1 /*
   2     comedi/drivers/ni_labpc.c
   3     Driver for National Instruments Lab-PC series boards and compatibles
   4     Copyright (C) 2001, 2002, 2003 Frank Mori Hess <fmhess@users.sourceforge.net>
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19
  20 ************************************************************************
  21 */
  22 /*
  23 Driver: ni_labpc
  24 Description: National Instruments Lab-PC (& compatibles)
  25 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
  26 Devices: [National Instruments] Lab-PC-1200 (labpc-1200),
  27   Lab-PC-1200AI (labpc-1200ai), Lab-PC+ (lab-pc+), PCI-1200 (ni_labpc)
  28 Status: works
  29
  30 Tested with lab-pc-1200.  For the older Lab-PC+, not all input ranges
  31 and analog references will work, the available ranges/arefs will
  32 depend on how you have configured the jumpers on your board
  33 (see your owner's manual).
  34
  35 Kernel-level ISA plug-and-play support for the lab-pc-1200
  36 boards has not
  37 yet been added to the driver, mainly due to the fact that
  38 I don't know the device id numbers.  If you have one
  39 of these boards,
  40 please file a bug report at https://bugs.comedi.org/
  41 so I can get the necessary information from you.
  42
  43 The 1200 series boards have onboard calibration dacs for correcting
  44 analog input/output offsets and gains.  The proper settings for these
  45 caldacs are stored on the board's eeprom.  To read the caldac values
  46 from the eeprom and store them into a file that can be then be used by
  47 comedilib, use the comedi_calibrate program.
  48
  49 Configuration options - ISA boards:
  50   [0] - I/O port base address
  51   [1] - IRQ (optional, required for timed or externally triggered conversions)
  52   [2] - DMA channel (optional)
  53
  54 Configuration options - PCI boards:
  55   [0] - bus (optional)
  56   [1] - slot (optional)
  57
  58 The Lab-pc+ has quirky chanlist requirements
  59 when scanning multiple channels.  Multiple channel scan
  60 sequence must start at highest channel, then decrement down to
  61 channel 0.  The rest of the cards can scan down like lab-pc+ or scan
  62 up from channel zero.  Chanlists consisting of all one channel
  63 are also legal, and allow you to pace conversions in bursts.
  64
  65 */
  66
  67 /*
  68
  69 NI manuals:
  70 341309a (labpc-1200 register manual)
  71 340914a (pci-1200)
  72 320502b (lab-pc+)
  73
  74 */
  75
  76 #undef LABPC_DEBUG
  77 //#define LABPC_DEBUG   // enable debugging messages
  78
  79 #include <linux/comedidev.h>
  80
  81 #include <linux/delay.h>
  82 #include <asm/dma.h>
  83
  84 #include "8253.h"
  85 #include "8255.h"
  86 #include "mite.h"
  87 #include "comedi_fc.h"
  88 #include "ni_labpc.h"
  89
  90 #define DRV_NAME "ni_labpc"
  91
  92 #define LABPC_SIZE           32 // size of io region used by board
  93 #define LABPC_TIMER_BASE            500 // 2 MHz master clock
  94
  95 /* Registers for the lab-pc+ */
  96
  97 //write-only registers
  98 #define COMMAND1_REG    0x0
  99 #define   ADC_GAIN_MASK (0x7 << 4)
 100 #define   ADC_CHAN_BITS(x)      ((x) & 0x7)
 101 #define   ADC_SCAN_EN_BIT       0x80    // enables multi channel scans
 102 #define COMMAND2_REG    0x1
 103 #define   PRETRIG_BIT   0x1     // enable pretriggering (used in conjunction with SWTRIG)
 104 #define   HWTRIG_BIT    0x2     // enable paced conversions on external trigger
 105 #define   SWTRIG_BIT    0x4     // enable paced conversions
 106 #define   CASCADE_BIT   0x8     // use two cascaded counters for pacing
 107 #define   DAC_PACED_BIT(channel)        (0x40 << ((channel) & 0x1))
 108 #define COMMAND3_REG    0x2
 109 #define   DMA_EN_BIT    0x1     // enable dma transfers
 110 #define   DIO_INTR_EN_BIT       0x2     // enable interrupts for 8255
 111 #define   DMATC_INTR_EN_BIT     0x4     // enable dma terminal count interrupt
 112 #define   TIMER_INTR_EN_BIT     0x8     // enable timer interrupt
 113 #define   ERR_INTR_EN_BIT       0x10    // enable error interrupt
 114 #define   ADC_FNE_INTR_EN_BIT   0x20    // enable fifo not empty interrupt
 115 #define ADC_CONVERT_REG 0x3
 116 #define DAC_LSB_REG(channel)    (0x4 + 2 * ((channel) & 0x1))
 117 #define DAC_MSB_REG(channel)    (0x5 + 2 * ((channel) & 0x1))
 118 #define ADC_CLEAR_REG   0x8
 119 #define DMATC_CLEAR_REG 0xa
 120 #define TIMER_CLEAR_REG 0xc
 121 #define COMMAND6_REG    0xe     // 1200 boards only
 122 #define   ADC_COMMON_BIT        0x1     // select ground or common-mode reference
 123 #define   ADC_UNIP_BIT  0x2     // adc unipolar
 124 #define   DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1))      // dac unipolar
 125 #define   ADC_FHF_INTR_EN_BIT   0x20    // enable fifo half full interrupt
 126 #define   A1_INTR_EN_BIT        0x40    // enable interrupt on end of hardware count
 127 #define   ADC_SCAN_UP_BIT 0x80  // scan up from channel zero instead of down to zero
 128 #define COMMAND4_REG    0xf
 129 #define   INTERVAL_SCAN_EN_BIT  0x1     // enables 'interval' scanning
 130 #define   EXT_SCAN_EN_BIT       0x2     // enables external signal on counter b1 output to trigger scan
 131 #define   EXT_CONVERT_OUT_BIT   0x4     // chooses direction (output or input) for EXTCONV* line
 132 #define   ADC_DIFF_BIT  0x8     // chooses differential inputs for adc (in conjunction with board jumper)
 133 #define   EXT_CONVERT_DISABLE_BIT       0x10
 134 #define COMMAND5_REG    0x1c    // 1200 boards only, calibration stuff
 135 #define   EEPROM_WRITE_UNPROTECT_BIT    0x4     // enable eeprom for write
 136 #define   DITHER_EN_BIT 0x8     // enable dithering
 137 #define   CALDAC_LOAD_BIT       0x10    // load calibration dac
 138 #define   SCLOCK_BIT    0x20    // serial clock - rising edge writes, falling edge reads
 139 #define   SDATA_BIT     0x40    // serial data bit for writing to eeprom or calibration dacs
 140 #define   EEPROM_EN_BIT 0x80    // enable eeprom for read/write
 141 #define INTERVAL_COUNT_REG      0x1e
 142 #define INTERVAL_LOAD_REG       0x1f
 143 #define   INTERVAL_LOAD_BITS    0x1
 144
 145 // read-only registers
 146 #define STATUS1_REG     0x0
 147 #define   DATA_AVAIL_BIT        0x1     // data is available in fifo
 148 #define   OVERRUN_BIT   0x2     // overrun has occurred
 149 #define   OVERFLOW_BIT  0x4     // fifo overflow
 150 #define   TIMER_BIT     0x8     // timer interrupt has occured
 151 #define   DMATC_BIT     0x10    // dma terminal count has occured
 152 #define   EXT_TRIG_BIT  0x40    // external trigger has occured
 153 #define STATUS2_REG     0x1d    // 1200 boards only
 154 #define   EEPROM_OUT_BIT        0x1     // programmable eeprom serial output
 155 #define   A1_TC_BIT     0x2     // counter A1 terminal count
 156 #define   FNHF_BIT      0x4     // fifo not half full
 157 #define ADC_FIFO_REG    0xa
 158
 159 #define DIO_BASE_REG    0x10
 160 #define COUNTER_A_BASE_REG      0x14
 161 #define COUNTER_A_CONTROL_REG   (COUNTER_A_BASE_REG + 0x3)
 162 #define   INIT_A0_BITS  0x14    // check modes put conversion pacer output in harmless state (a0 mode 2)
 163 #define   INIT_A1_BITS  0x70    // put hardware conversion counter output in harmless state (a1 mode 0)
 164 #define COUNTER_B_BASE_REG      0x18
 165
 166 static int labpc_attach(comedi_device * dev, comedi_devconfig * it);
 167 static int labpc_cancel(comedi_device * dev, comedi_subdevice * s);
 168 static irqreturn_t labpc_interrupt(int irq, void *d PT_REGS_ARG);
 169 static int labpc_drain_fifo(comedi_device * dev);
 170 static void labpc_drain_dma(comedi_device * dev);
 171 static void handle_isa_dma(comedi_device * dev);
 172 static void labpc_drain_dregs(comedi_device * dev);
 173 static int labpc_ai_cmdtest(comedi_device * dev, comedi_subdevice * s,
 174         comedi_cmd * cmd);
 175 static int labpc_ai_cmd(comedi_device * dev, comedi_subdevice * s);
 176 static int labpc_ai_rinsn(comedi_device * dev, comedi_subdevice * s,
 177         comedi_insn * insn, lsampl_t * data);
 178 static int labpc_ao_winsn(comedi_device * dev, comedi_subdevice * s,
 179         comedi_insn * insn, lsampl_t * data);
 180 static int labpc_ao_rinsn(comedi_device * dev, comedi_subdevice * s,
 181         comedi_insn * insn, lsampl_t * data);
 182 static int labpc_calib_read_insn(comedi_device * dev, comedi_subdevice * s,
 183         comedi_insn * insn, lsampl_t * data);
 184 static int labpc_calib_write_insn(comedi_device * dev, comedi_subdevice * s,
 185         comedi_insn * insn, lsampl_t * data);
 186 static int labpc_eeprom_read_insn(comedi_device * dev, comedi_subdevice * s,
 187         comedi_insn * insn, lsampl_t * data);
 188 static int labpc_eeprom_write_insn(comedi_device * dev, comedi_subdevice * s,
 189         comedi_insn * insn, lsampl_t * data);
 190 static unsigned int labpc_suggest_transfer_size(comedi_cmd cmd);
 191 static void labpc_adc_timing(comedi_device * dev, comedi_cmd * cmd);
 192 #ifdef CONFIG_COMEDI_PCI
 193 static int labpc_find_device(comedi_device *dev, int bus, int slot);
 194 #endif
 195 static int labpc_dio_mem_callback(int dir, int port, int data,
 196         unsigned long arg);
 197 static void labpc_serial_out(comedi_device * dev, unsigned int value,
 198         unsigned int num_bits);
 199 static unsigned int labpc_serial_in(comedi_device * dev);
 200 static unsigned int labpc_eeprom_read(comedi_device * dev,
 201         unsigned int address);
 202 static unsigned int labpc_eeprom_read_status(comedi_device * dev);
 203 static unsigned int labpc_eeprom_write(comedi_device * dev,
 204         unsigned int address, unsigned int value);
 205 static void write_caldac(comedi_device * dev, unsigned int channel,
 206         unsigned int value);
 207
 208 enum scan_mode {
 209         MODE_SINGLE_CHAN,
 210         MODE_SINGLE_CHAN_INTERVAL,
 211         MODE_MULT_CHAN_UP,
 212         MODE_MULT_CHAN_DOWN,
 213 };
 214
 215 //analog input ranges
 216 #define NUM_LABPC_PLUS_AI_RANGES 16
 217 // indicates unipolar ranges
 218 static const int labpc_plus_is_unipolar[NUM_LABPC_PLUS_AI_RANGES] = {
 219         0,
 220         0,
 221         0,
 222         0,
 223         0,
 224         0,
 225         0,
 226         0,
 227         1,
 228         1,
 229         1,
 230         1,
 231         1,
 232         1,
 233         1,
 234         1,
 235 };
 236
 237 // map range index to gain bits
 238 static const int labpc_plus_ai_gain_bits[NUM_LABPC_PLUS_AI_RANGES] = {
 239         0x00,
 240         0x10,
 241         0x20,
 242         0x30,
 243         0x40,
 244         0x50,
 245         0x60,
 246         0x70,
 247         0x00,
 248         0x10,
 249         0x20,
 250         0x30,
 251         0x40,
 252         0x50,
 253         0x60,
 254         0x70,
 255 };
 256 static const comedi_lrange range_labpc_plus_ai = {
 257         NUM_LABPC_PLUS_AI_RANGES,
 258         {
 259                         BIP_RANGE(5),
 260                         BIP_RANGE(4),
 261                         BIP_RANGE(2.5),
 262                         BIP_RANGE(1),
 263                         BIP_RANGE(0.5),
 264                         BIP_RANGE(0.25),
 265                         BIP_RANGE(0.1),
 266                         BIP_RANGE(0.05),
 267                         UNI_RANGE(10),
 268                         UNI_RANGE(8),
 269                         UNI_RANGE(5),
 270                         UNI_RANGE(2),
 271                         UNI_RANGE(1),
 272                         UNI_RANGE(0.5),
 273                         UNI_RANGE(0.2),
 274                         UNI_RANGE(0.1),
 275                 }
 276 };
 277
 278 #define NUM_LABPC_1200_AI_RANGES 14
 279 // indicates unipolar ranges
 280 const int labpc_1200_is_unipolar[NUM_LABPC_1200_AI_RANGES] = {
 281         0,
 282         0,
 283         0,
 284         0,
 285         0,
 286         0,
 287         0,
 288         1,
 289         1,
 290         1,
 291         1,
 292         1,
 293         1,
 294         1,
 295 };
 296
 297 // map range index to gain bits
 298 const int labpc_1200_ai_gain_bits[NUM_LABPC_1200_AI_RANGES] = {
 299         0x00,
 300         0x20,
 301         0x30,
 302         0x40,
 303         0x50,
 304         0x60,
 305         0x70,
 306         0x00,
 307         0x20,
 308         0x30,
 309         0x40,
 310         0x50,
 311         0x60,
 312         0x70,
 313 };
 314 const comedi_lrange range_labpc_1200_ai = {
 315         NUM_LABPC_1200_AI_RANGES,
 316         {
 317                         BIP_RANGE(5),
 318                         BIP_RANGE(2.5),
 319                         BIP_RANGE(1),
 320                         BIP_RANGE(0.5),
 321                         BIP_RANGE(0.25),
 322                         BIP_RANGE(0.1),
 323                         BIP_RANGE(0.05),
 324                         UNI_RANGE(10),
 325                         UNI_RANGE(5),
 326                         UNI_RANGE(2),
 327                         UNI_RANGE(1),
 328                         UNI_RANGE(0.5),
 329                         UNI_RANGE(0.2),
 330                         UNI_RANGE(0.1),
 331                 }
 332 };
 333
 334 //analog output ranges
 335 #define AO_RANGE_IS_UNIPOLAR 0x1
 336 static const comedi_lrange range_labpc_ao = {
 337         2,
 338         {
 339                         BIP_RANGE(5),
 340                         UNI_RANGE(10),
 341                 }
 342 };
 343
 344 /* functions that do inb/outb and readb/writeb so we can use
 345  * function pointers to decide which to use */
 346 static inline unsigned int labpc_inb(unsigned long address)
 347 {
 348         return inb(address);
 349 }
 350 static inline void labpc_outb(unsigned int byte, unsigned long address)
 351 {
 352         outb(byte, address);
 353 }
 354 static inline unsigned int labpc_readb(unsigned long address)
 355 {
 356         return readb((void *)address);
 357 }
 358 static inline void labpc_writeb(unsigned int byte, unsigned long address)
 359 {
 360         writeb(byte, (void *)address);
 361 }
 362
 363 static const labpc_board labpc_boards[] = {
 364         {
 365               name:     "lab-pc-1200",
 366               ai_speed:10000,
 367               bustype:  isa_bustype,
 368               register_layout:labpc_1200_layout,
 369               has_ao:   1,
 370               ai_range_table:&range_labpc_1200_ai,
 371               ai_range_code:labpc_1200_ai_gain_bits,
 372               ai_range_is_unipolar:labpc_1200_is_unipolar,
 373               ai_scan_up:1,
 374               memory_mapped_io:0,
 375                 },
 376         {
 377               name:     "lab-pc-1200ai",
 378               ai_speed:10000,
 379               bustype:  isa_bustype,
 380               register_layout:labpc_1200_layout,
 381               has_ao:   0,
 382               ai_range_table:&range_labpc_1200_ai,
 383               ai_range_code:labpc_1200_ai_gain_bits,
 384               ai_range_is_unipolar:labpc_1200_is_unipolar,
 385               ai_scan_up:1,
 386               memory_mapped_io:0,
 387                 },
 388         {
 389               name:     "lab-pc+",
 390               ai_speed:12000,
 391               bustype:  isa_bustype,
 392               register_layout:labpc_plus_layout,
 393               has_ao:   1,
 394               ai_range_table:&range_labpc_plus_ai,
 395               ai_range_code:labpc_plus_ai_gain_bits,
 396               ai_range_is_unipolar:labpc_plus_is_unipolar,
 397               ai_scan_up:0,
 398               memory_mapped_io:0,
 399                 },
 400 #ifdef CONFIG_COMEDI_PCI
 401         {
 402                 name:   "pci-1200",
 403                 device_id:0x161,
 404                 ai_speed:10000,
 405                 bustype:        pci_bustype,
 406                 register_layout:labpc_1200_layout,
 407                 has_ao: 1,
 408                 ai_range_table:&range_labpc_1200_ai,
 409                 ai_range_code:labpc_1200_ai_gain_bits,
 410                 ai_range_is_unipolar:labpc_1200_is_unipolar,
 411                 ai_scan_up:1,
 412                 memory_mapped_io:1,
 413                 },
 414         // dummy entry so pci board works when comedi_config is passed driver name
 415         {
 416                 .name = DRV_NAME,
 417                 .bustype = pci_bustype,
 418                 },
 419 #endif
 420 };
 421
 422 /*
 423  * Useful for shorthand access to the particular board structure
 424  */
 425 #define thisboard ((labpc_board *)dev->board_ptr)
 426
 427 static const int dma_buffer_size = 0xff00;      // size in bytes of dma buffer
 428 static const int sample_size = 2;       // 2 bytes per sample
 429
 430 #define devpriv ((labpc_private *)dev->private)
 431
 432 static comedi_driver driver_labpc = {
 433         .driver_name = DRV_NAME,
 434         .module = THIS_MODULE,
 435         .attach = labpc_attach,
 436         .detach = labpc_common_detach,
 437         .num_names = sizeof(labpc_boards) / sizeof(labpc_board),
 438         .board_name = &labpc_boards[0].name,
 439         .offset = sizeof(labpc_board),
 440 };
 441
 442 #ifdef CONFIG_COMEDI_PCI
 443 static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
 444         {PCI_VENDOR_ID_NATINST, 0x161, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
 445         {0}
 446 };
 447
 448 MODULE_DEVICE_TABLE(pci, labpc_pci_table);
 449 #endif /* CONFIG_COMEDI_PCI */
 450
 451 static inline int labpc_counter_load(comedi_device * dev,
 452         unsigned long base_address, unsigned int counter_number,
 453         unsigned int count, unsigned int mode)
 454 {
 455         if (thisboard->memory_mapped_io)
 456                 return i8254_mm_load((void *)base_address, 0, counter_number,
 457                         count, mode);
 458         else
 459                 return i8254_load(base_address, 0, counter_number, count, mode);
 460 }
 461
 462 int labpc_common_attach(comedi_device * dev, unsigned long iobase,
 463         unsigned int irq, unsigned int dma_chan)
 464 {
 465         comedi_subdevice *s;
 466         int i;
 467         unsigned long dma_flags, isr_flags;
 468         short lsb, msb;
 469
 470         printk("comedi%d: ni_labpc: %s, io 0x%lx", dev->minor, thisboard->name,
 471                 iobase);
 472         if (irq) {
 473                 printk(", irq %u", irq);
 474         }
 475         if (dma_chan) {
 476                 printk(", dma %u", dma_chan);
 477         }
 478         printk("\n");
 479
 480         if (iobase == 0) {
 481                 printk("io base address is zero!\n");
 482                 return -EINVAL;
 483         }
 484         // request io regions for isa boards
 485         if (thisboard->bustype == isa_bustype) {
 486                 /* check if io addresses are available */
 487                 if (!request_region(iobase, LABPC_SIZE,
 488                                 driver_labpc.driver_name)) {
 489                         printk("I/O port conflict\n");
 490                         return -EIO;
 491                 }
 492         }
 493         dev->iobase = iobase;
 494
 495         if (thisboard->memory_mapped_io) {
 496                 devpriv->read_byte = labpc_readb;
 497                 devpriv->write_byte = labpc_writeb;
 498         } else {
 499                 devpriv->read_byte = labpc_inb;
 500                 devpriv->write_byte = labpc_outb;
 501         }
 502         // initialize board's command registers
 503         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
 504         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 505         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 506         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
 507         if (thisboard->register_layout == labpc_1200_layout) {
 508                 devpriv->write_byte(devpriv->command5_bits,
 509                         dev->iobase + COMMAND5_REG);
 510                 devpriv->write_byte(devpriv->command6_bits,
 511                         dev->iobase + COMMAND6_REG);
 512         }
 513
 514         /* grab our IRQ */
 515         if (irq) {
 516                 isr_flags = 0;
 517                 if (thisboard->bustype == pci_bustype
 518                     || thisboard->bustype == pcmcia_bustype)
 519                         isr_flags |= IRQF_SHARED;
 520                 if (comedi_request_irq(irq, labpc_interrupt, isr_flags,
 521                                 driver_labpc.driver_name, dev)) {
 522                         printk("unable to allocate irq %u\n", irq);
 523                         return -EINVAL;
 524                 }
 525         }
 526         dev->irq = irq;
 527
 528         // grab dma channel
 529         if (dma_chan > 3) {
 530                 printk(" invalid dma channel %u\n", dma_chan);
 531                 return -EINVAL;
 532         } else if (dma_chan) {
 533                 // allocate dma buffer
 534                 devpriv->dma_buffer =
 535                         kmalloc(dma_buffer_size, GFP_KERNEL | GFP_DMA);
 536                 if (devpriv->dma_buffer == NULL) {
 537                         printk(" failed to allocate dma buffer\n");
 538                         return -ENOMEM;
 539                 }
 540                 if (request_dma(dma_chan, driver_labpc.driver_name)) {
 541                         printk(" failed to allocate dma channel %u\n",
 542                                 dma_chan);
 543                         return -EINVAL;
 544                 }
 545                 devpriv->dma_chan = dma_chan;
 546                 dma_flags = claim_dma_lock();
 547                 disable_dma(devpriv->dma_chan);
 548                 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
 549                 release_dma_lock(dma_flags);
 550         }
 551
 552         dev->board_name = thisboard->name;
 553
 554         if (alloc_subdevices(dev, 5) < 0)
 555                 return -ENOMEM;
 556
 557         /* analog input subdevice */
 558         s = dev->subdevices + 0;
 559         dev->read_subdev = s;
 560         s->type = COMEDI_SUBD_AI;
 561         s->subdev_flags =
 562                 SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF |
 563                 SDF_CMD_READ;
 564         s->n_chan = 8;
 565         s->len_chanlist = 8;
 566         s->maxdata = (1 << 12) - 1;     // 12 bit resolution
 567         s->range_table = thisboard->ai_range_table;
 568         s->do_cmd = labpc_ai_cmd;
 569         s->do_cmdtest = labpc_ai_cmdtest;
 570         s->insn_read = labpc_ai_rinsn;
 571         s->cancel = labpc_cancel;
 572
 573         /* analog output */
 574         s = dev->subdevices + 1;
 575         if (thisboard->has_ao) {
 576 /* Could provide command support, except it only has a one sample
 577  * hardware buffer for analog output and no underrun flag. */
 578                 s->type = COMEDI_SUBD_AO;
 579                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
 580                 s->n_chan = NUM_AO_CHAN;
 581                 s->maxdata = (1 << 12) - 1;     // 12 bit resolution
 582                 s->range_table = &range_labpc_ao;
 583                 s->insn_read = labpc_ao_rinsn;
 584                 s->insn_write = labpc_ao_winsn;
 585                 /* initialize analog outputs to a known value */
 586                 for (i = 0; i < s->n_chan; i++) {
 587                         devpriv->ao_value[i] = s->maxdata / 2;
 588                         lsb = devpriv->ao_value[i] & 0xff;
 589                         msb = (devpriv->ao_value[i] >> 8) & 0xff;
 590                         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
 591                         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
 592                 }
 593         } else {
 594                 s->type = COMEDI_SUBD_UNUSED;
 595         }
 596
 597         /* 8255 dio */
 598         s = dev->subdevices + 2;
 599         // if board uses io memory we have to give a custom callback function to the 8255 driver
 600         if (thisboard->memory_mapped_io)
 601                 subdev_8255_init(dev, s, labpc_dio_mem_callback,
 602                         (unsigned long)(dev->iobase + DIO_BASE_REG));
 603         else
 604                 subdev_8255_init(dev, s, NULL, dev->iobase + DIO_BASE_REG);
 605
 606         // calibration subdevices for boards that have one
 607         s = dev->subdevices + 3;
 608         if (thisboard->register_layout == labpc_1200_layout) {
 609                 s->type = COMEDI_SUBD_CALIB;
 610                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 611                 s->n_chan = 16;
 612                 s->maxdata = 0xff;
 613                 s->insn_read = labpc_calib_read_insn;
 614                 s->insn_write = labpc_calib_write_insn;
 615
 616                 for (i = 0; i < s->n_chan; i++)
 617                         write_caldac(dev, i, s->maxdata / 2);
 618         } else
 619                 s->type = COMEDI_SUBD_UNUSED;
 620
 621         /* EEPROM */
 622         s = dev->subdevices + 4;
 623         if (thisboard->register_layout == labpc_1200_layout) {
 624                 s->type = COMEDI_SUBD_MEMORY;
 625                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 626                 s->n_chan = EEPROM_SIZE;
 627                 s->maxdata = 0xff;
 628                 s->insn_read = labpc_eeprom_read_insn;
 629                 s->insn_write = labpc_eeprom_write_insn;
 630
 631                 for (i = 0; i < EEPROM_SIZE; i++) {
 632                         devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
 633                 }
 634 #ifdef LABPC_DEBUG
 635                 printk(" eeprom:");
 636                 for (i = 0; i < EEPROM_SIZE; i++) {
 637                         printk(" %i:0x%x ", i, devpriv->eeprom_data[i]);
 638                 }
 639                 printk("\n");
 640 #endif
 641         } else
 642                 s->type = COMEDI_SUBD_UNUSED;
 643
 644         return 0;
 645 }
 646
 647 static int labpc_attach(comedi_device * dev, comedi_devconfig * it)
 648 {
 649         unsigned long iobase = 0;
 650         unsigned int irq = 0;
 651         unsigned int dma_chan = 0;
 652 #ifdef CONFIG_COMEDI_PCI
 653         int retval;
 654 #endif
 655
 656         /* allocate and initialize dev->private */
 657         if (alloc_private(dev, sizeof(labpc_private)) < 0)
 658                 return -ENOMEM;
 659
 660         // get base address, irq etc. based on bustype
 661         switch (thisboard->bustype) {
 662         case isa_bustype:
 663                 iobase = it->options[0];
 664                 irq = it->options[1];
 665                 dma_chan = it->options[2];
 666                 break;
 667         case pci_bustype:
 668 #ifdef CONFIG_COMEDI_PCI
 669                 retval = labpc_find_device(dev, it->options[0], it->options[1]);
 670                 if (retval < 0) {
 671                         return retval;
 672                 }
 673                 retval = mite_setup(devpriv->mite);
 674                 if (retval < 0)
 675                         return retval;
 676                 iobase = (unsigned long)devpriv->mite->daq_io_addr;
 677                 irq = mite_irq(devpriv->mite);
 678 #else
 679                 printk(" this driver has not been built with PCI support.\n");
 680                 return -EINVAL;
 681 #endif
 682                 break;
 683         case pcmcia_bustype:
 684                 printk(" this driver does not support pcmcia cards, use ni_labpc_cs.o\n");
 685                 return -EINVAL;
 686                 break;
 687         default:
 688                 printk("bug! couldn't determine board type\n");
 689                 return -EINVAL;
 690                 break;
 691         }
 692
 693         return labpc_common_attach(dev, iobase, irq, dma_chan);
 694 }
 695
 696 // adapted from ni_pcimio for finding mite based boards (pc-1200)
 697 #ifdef CONFIG_COMEDI_PCI
 698 static int labpc_find_device(comedi_device *dev, int bus, int slot)
 699 {
 700         struct mite_struct *mite;
 701         int i;
 702         for (mite = mite_devices; mite; mite = mite->next) {
 703                 if (mite->used)
 704                         continue;
 705                 // if bus/slot are specified then make sure we have the right bus/slot
 706                 if (bus || slot) {
 707                         if (bus != mite->pcidev->bus->number
 708                                 || slot != PCI_SLOT(mite->pcidev->devfn))
 709                                 continue;
 710                 }
 711                 for (i = 0; i < driver_labpc.num_names; i++) {
 712                         if (labpc_boards[i].bustype != pci_bustype)
 713                                 continue;
 714                         if (mite_device_id(mite) == labpc_boards[i].device_id) {
 715                                 devpriv->mite = mite;
 716                                 // fixup board pointer, in case we were using the dummy "ni_labpc" entry
 717                                 dev->board_ptr = &labpc_boards[i];
 718                                 return 0;
 719                         }
 720                 }
 721         }
 722         printk("no device found\n");
 723         mite_list_devices();
 724         return -EIO;
 725 }
 726 #endif
 727
 728 int labpc_common_detach(comedi_device * dev)
 729 {
 730         printk("comedi%d: ni_labpc: detach\n", dev->minor);
 731
 732         if (dev->subdevices)
 733                 subdev_8255_cleanup(dev, dev->subdevices + 2);
 734
 735         /* only free stuff if it has been allocated by _attach */
 736         if (devpriv->dma_buffer)
 737                 kfree(devpriv->dma_buffer);
 738         if (devpriv->dma_chan)
 739                 free_dma(devpriv->dma_chan);
 740         if (dev->irq)
 741                 comedi_free_irq(dev->irq, dev);
 742         if (thisboard->bustype == isa_bustype && dev->iobase)
 743                 release_region(dev->iobase, LABPC_SIZE);
 744 #ifdef CONFIG_COMEDI_PCI
 745         if (devpriv->mite)
 746                 mite_unsetup(devpriv->mite);
 747 #endif
 748
 749         return 0;
 750 };
 751
 752 static void labpc_clear_adc_fifo(const comedi_device * dev)
 753 {
 754         devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
 755         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 756         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 757 }
 758
 759 static int labpc_cancel(comedi_device * dev, comedi_subdevice * s)
 760 {
 761         unsigned long flags;
 762
 763         comedi_spin_lock_irqsave(&dev->spinlock, flags);
 764         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
 765         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 766         comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
 767
 768         devpriv->command3_bits = 0;
 769         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 770
 771         return 0;
 772 }
 773
 774 static enum scan_mode labpc_ai_scan_mode(const comedi_cmd * cmd)
 775 {
 776         if (cmd->chanlist_len == 1)
 777                 return MODE_SINGLE_CHAN;
 778
 779         /* chanlist may be NULL during cmdtest. */
 780         if (cmd->chanlist == NULL)
 781                 return MODE_MULT_CHAN_UP;
 782
 783         if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
 784                 return MODE_SINGLE_CHAN_INTERVAL;
 785
 786         if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
 787                 return MODE_MULT_CHAN_UP;
 788
 789         if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
 790                 return MODE_MULT_CHAN_DOWN;
 791
 792         rt_printk("ni_labpc: bug! this should never happen\n");
 793
 794         return 0;
 795 }
 796
 797 static int labpc_ai_chanlist_invalid(const comedi_device * dev,
 798         const comedi_cmd * cmd)
 799 {
 800         int mode, channel, range, aref, i;
 801
 802         if (cmd->chanlist == NULL)
 803                 return 0;
 804
 805         mode = labpc_ai_scan_mode(cmd);
 806
 807         if (mode == MODE_SINGLE_CHAN)
 808                 return 0;
 809
 810         if (mode == MODE_SINGLE_CHAN_INTERVAL) {
 811                 if (cmd->chanlist_len > 0xff) {
 812                         comedi_error(dev,
 813                                 "ni_labpc: chanlist too long for single channel interval mode\n");
 814                         return 1;
 815                 }
 816         }
 817
 818         channel = CR_CHAN(cmd->chanlist[0]);
 819         range = CR_RANGE(cmd->chanlist[0]);
 820         aref = CR_AREF(cmd->chanlist[0]);
 821
 822         for (i = 0; i < cmd->chanlist_len; i++) {
 823
 824                 switch (mode) {
 825                 case MODE_SINGLE_CHAN_INTERVAL:
 826                         if (CR_CHAN(cmd->chanlist[i]) != channel) {
 827                                 comedi_error(dev,
 828                                         "channel scanning order specified in chanlist is not supported by hardware.\n");
 829                                 return 1;
 830                         }
 831                         break;
 832                 case MODE_MULT_CHAN_UP:
 833                         if (CR_CHAN(cmd->chanlist[i]) != i) {
 834                                 comedi_error(dev,
 835                                         "channel scanning order specified in chanlist is not supported by hardware.\n");
 836                                 return 1;
 837                         }
 838                         break;
 839                 case MODE_MULT_CHAN_DOWN:
 840                         if (CR_CHAN(cmd->chanlist[i]) !=
 841                                 cmd->chanlist_len - i - 1) {
 842                                 comedi_error(dev,
 843                                         "channel scanning order specified in chanlist is not supported by hardware.\n");
 844                                 return 1;
 845                         }
 846                         break;
 847                 default:
 848                         rt_printk("ni_labpc: bug! in chanlist check\n");
 849                         return 1;
 850                         break;
 851                 }
 852
 853                 if (CR_RANGE(cmd->chanlist[i]) != range) {
 854                         comedi_error(dev,
 855                                 "entries in chanlist must all have the same range\n");
 856                         return 1;
 857                 }
 858
 859                 if (CR_AREF(cmd->chanlist[i]) != aref) {
 860                         comedi_error(dev,
 861                                 "entries in chanlist must all have the same reference\n");
 862                         return 1;
 863                 }
 864         }
 865
 866         return 0;
 867 }
 868
 869 static int labpc_use_continuous_mode(const comedi_cmd * cmd)
 870 {
 871         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN)
 872                 return 1;
 873
 874         if (cmd->scan_begin_src == TRIG_FOLLOW)
 875                 return 1;
 876
 877         return 0;
 878 }
 879
 880 static unsigned int labpc_ai_convert_period(const comedi_cmd * cmd)
 881 {
 882         if (cmd->convert_src != TRIG_TIMER)
 883                 return 0;
 884
 885         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 886                 cmd->scan_begin_src == TRIG_TIMER)
 887                 return cmd->scan_begin_arg;
 888
 889         return cmd->convert_arg;
 890 }
 891
 892 static void labpc_set_ai_convert_period(comedi_cmd * cmd, unsigned int ns)
 893 {
 894         if (cmd->convert_src != TRIG_TIMER)
 895                 return;
 896
 897         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 898                 cmd->scan_begin_src == TRIG_TIMER) {
 899                 cmd->scan_begin_arg = ns;
 900                 if (cmd->convert_arg > cmd->scan_begin_arg)
 901                         cmd->convert_arg = cmd->scan_begin_arg;
 902         } else
 903                 cmd->convert_arg = ns;
 904 }
 905
 906 static unsigned int labpc_ai_scan_period(const comedi_cmd * cmd)
 907 {
 908         if (cmd->scan_begin_src != TRIG_TIMER)
 909                 return 0;
 910
 911         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 912                 cmd->convert_src == TRIG_TIMER)
 913                 return 0;
 914
 915         return cmd->scan_begin_arg;
 916 }
 917
 918 static void labpc_set_ai_scan_period(comedi_cmd * cmd, unsigned int ns)
 919 {
 920         if (cmd->scan_begin_src != TRIG_TIMER)
 921                 return;
 922
 923         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 924                 cmd->convert_src == TRIG_TIMER)
 925                 return;
 926
 927         cmd->scan_begin_arg = ns;
 928 }
 929
 930 static int labpc_ai_cmdtest(comedi_device * dev, comedi_subdevice * s,
 931         comedi_cmd * cmd)
 932 {
 933         int err = 0;
 934         int tmp, tmp2;
 935         int stop_mask;
 936
 937         /* step 1: make sure trigger sources are trivially valid */
 938
 939         tmp = cmd->start_src;
 940         cmd->start_src &= TRIG_NOW | TRIG_EXT;
 941         if (!cmd->start_src || tmp != cmd->start_src)
 942                 err++;
 943
 944         tmp = cmd->scan_begin_src;
 945         cmd->scan_begin_src &= TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT;
 946         if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
 947                 err++;
 948
 949         tmp = cmd->convert_src;
 950         cmd->convert_src &= TRIG_TIMER | TRIG_EXT;
 951         if (!cmd->convert_src || tmp != cmd->convert_src)
 952                 err++;
 953
 954         tmp = cmd->scan_end_src;
 955         cmd->scan_end_src &= TRIG_COUNT;
 956         if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
 957                 err++;
 958
 959         tmp = cmd->stop_src;
 960         stop_mask = TRIG_COUNT | TRIG_NONE;
 961         if (thisboard->register_layout == labpc_1200_layout)
 962                 stop_mask |= TRIG_EXT;
 963         cmd->stop_src &= stop_mask;
 964         if (!cmd->stop_src || tmp != cmd->stop_src)
 965                 err++;
 966
 967         if (err)
 968                 return 1;
 969
 970         /* step 2: make sure trigger sources are unique and mutually compatible */
 971
 972         if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT)
 973                 err++;
 974         if (cmd->scan_begin_src != TRIG_TIMER &&
 975                 cmd->scan_begin_src != TRIG_FOLLOW &&
 976                 cmd->scan_begin_src != TRIG_EXT)
 977                 err++;
 978         if (cmd->convert_src != TRIG_TIMER && cmd->convert_src != TRIG_EXT)
 979                 err++;
 980         if (cmd->stop_src != TRIG_COUNT &&
 981                 cmd->stop_src != TRIG_EXT && cmd->stop_src != TRIG_NONE)
 982                 err++;
 983
 984         // can't have external stop and start triggers at once
 985         if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
 986                 err++;
 987
 988         if (err)
 989                 return 2;
 990
 991         /* step 3: make sure arguments are trivially compatible */
 992
 993         if (cmd->start_arg == TRIG_NOW && cmd->start_arg != 0) {
 994                 cmd->start_arg = 0;
 995                 err++;
 996         }
 997
 998         if (!cmd->chanlist_len) {
 999                 err++;
1000         }
1001         if (cmd->scan_end_arg != cmd->chanlist_len) {
1002                 cmd->scan_end_arg = cmd->chanlist_len;
1003                 err++;
1004         }
1005
1006         if (cmd->convert_src == TRIG_TIMER) {
1007                 if (cmd->convert_arg < thisboard->ai_speed) {
1008                         cmd->convert_arg = thisboard->ai_speed;
1009                         err++;
1010                 }
1011         }
1012         // make sure scan timing is not too fast
1013         if (cmd->scan_begin_src == TRIG_TIMER) {
1014                 if (cmd->convert_src == TRIG_TIMER &&
1015                         cmd->scan_begin_arg <
1016                         cmd->convert_arg * cmd->chanlist_len) {
1017                         cmd->scan_begin_arg =
1018                                 cmd->convert_arg * cmd->chanlist_len;
1019                         err++;
1020                 }
1021                 if (cmd->scan_begin_arg <
1022                         thisboard->ai_speed * cmd->chanlist_len) {
1023                         cmd->scan_begin_arg =
1024                                 thisboard->ai_speed * cmd->chanlist_len;
1025                         err++;
1026                 }
1027         }
1028         // stop source
1029         switch (cmd->stop_src) {
1030         case TRIG_COUNT:
1031                 if (!cmd->stop_arg) {
1032                         cmd->stop_arg = 1;
1033                         err++;
1034                 }
1035                 break;
1036         case TRIG_NONE:
1037                 if (cmd->stop_arg != 0) {
1038                         cmd->stop_arg = 0;
1039                         err++;
1040                 }
1041                 break;
1042                 // TRIG_EXT doesn't care since it doesn't trigger off a numbered channel
1043         default:
1044                 break;
1045         }
1046
1047         if (err)
1048                 return 3;
1049
1050         /* step 4: fix up any arguments */
1051
1052         tmp = cmd->convert_arg;
1053         tmp2 = cmd->scan_begin_arg;
1054         labpc_adc_timing(dev, cmd);
1055         if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
1056                 err++;
1057
1058         if (err)
1059                 return 4;
1060
1061         if (labpc_ai_chanlist_invalid(dev, cmd))
1062                 return 5;
1063
1064         return 0;
1065 }
1066
1067 static int labpc_ai_cmd(comedi_device * dev, comedi_subdevice * s)
1068 {
1069         int channel, range, aref;
1070         unsigned long irq_flags;
1071         int ret;
1072         comedi_async *async = s->async;
1073         comedi_cmd *cmd = &async->cmd;
1074         enum transfer_type xfer;
1075         unsigned long flags;
1076
1077         if (!dev->irq) {
1078                 comedi_error(dev, "no irq assigned, cannot perform command");
1079                 return -1;
1080         }
1081
1082         range = CR_RANGE(cmd->chanlist[0]);
1083         aref = CR_AREF(cmd->chanlist[0]);
1084
1085         // make sure board is disabled before setting up aquisition
1086         comedi_spin_lock_irqsave(&dev->spinlock, flags);
1087         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1088         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1089         comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1090
1091         devpriv->command3_bits = 0;
1092         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1093
1094         // initialize software conversion count
1095         if (cmd->stop_src == TRIG_COUNT) {
1096                 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
1097         }
1098         // setup hardware conversion counter
1099         if (cmd->stop_src == TRIG_EXT) {
1100                 // load counter a1 with count of 3 (pc+ manual says this is minimum allowed) using mode 0
1101                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1102                         1, 3, 0);
1103                 if (ret < 0) {
1104                         comedi_error(dev, "error loading counter a1");
1105                         return -1;
1106                 }
1107         } else                  // otherwise, just put a1 in mode 0 with no count to set its output low
1108                 devpriv->write_byte(INIT_A1_BITS,
1109                         dev->iobase + COUNTER_A_CONTROL_REG);
1110
1111         // figure out what method we will use to transfer data
1112         if (devpriv->dma_chan &&        // need a dma channel allocated
1113                 // dma unsafe at RT priority, and too much setup time for TRIG_WAKE_EOS for
1114                 (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0 &&
1115                 // only available on the isa boards
1116                 thisboard->bustype == isa_bustype) {
1117                 xfer = isa_dma_transfer;
1118         } else if (thisboard->register_layout == labpc_1200_layout &&   // pc-plus has no fifo-half full interrupt
1119                 // wake-end-of-scan should interrupt on fifo not empty
1120                 (cmd->flags & TRIG_WAKE_EOS) == 0 &&
1121                 // make sure we are taking more than just a few points
1122                 (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
1123                 xfer = fifo_half_full_transfer;
1124         } else
1125                 xfer = fifo_not_empty_transfer;
1126         devpriv->current_transfer = xfer;
1127
1128         // setup command6 register for 1200 boards
1129         if (thisboard->register_layout == labpc_1200_layout) {
1130                 // reference inputs to ground or common?
1131                 if (aref != AREF_GROUND)
1132                         devpriv->command6_bits |= ADC_COMMON_BIT;
1133                 else
1134                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1135                 // bipolar or unipolar range?
1136                 if (thisboard->ai_range_is_unipolar[range])
1137                         devpriv->command6_bits |= ADC_UNIP_BIT;
1138                 else
1139                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1140                 // interrupt on fifo half full?
1141                 if (xfer == fifo_half_full_transfer)
1142                         devpriv->command6_bits |= ADC_FHF_INTR_EN_BIT;
1143                 else
1144                         devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1145                 // enable interrupt on counter a1 terminal count?
1146                 if (cmd->stop_src == TRIG_EXT)
1147                         devpriv->command6_bits |= A1_INTR_EN_BIT;
1148                 else
1149                         devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1150                 // are we scanning up or down through channels?
1151                 if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1152                         devpriv->command6_bits |= ADC_SCAN_UP_BIT;
1153                 else
1154                         devpriv->command6_bits &= ~ADC_SCAN_UP_BIT;
1155                 // write to register
1156                 devpriv->write_byte(devpriv->command6_bits,
1157                         dev->iobase + COMMAND6_REG);
1158         }
1159
1160         /* setup channel list, etc (command1 register) */
1161         devpriv->command1_bits = 0;
1162         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1163                 channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
1164         else
1165                 channel = CR_CHAN(cmd->chanlist[0]);
1166         // munge channel bits for differential / scan disabled mode
1167         if (labpc_ai_scan_mode(cmd) != MODE_SINGLE_CHAN && aref == AREF_DIFF)
1168                 channel *= 2;
1169         devpriv->command1_bits |= ADC_CHAN_BITS(channel);
1170         devpriv->command1_bits |= thisboard->ai_range_code[range];
1171         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1172         // manual says to set scan enable bit on second pass
1173         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP ||
1174                 labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_DOWN) {
1175                 devpriv->command1_bits |= ADC_SCAN_EN_BIT;
1176                 /* need a brief delay before enabling scan, or scan list will get screwed when you switch
1177                  * between scan up to scan down mode - dunno why */
1178                 comedi_udelay(1);
1179                 devpriv->write_byte(devpriv->command1_bits,
1180                         dev->iobase + COMMAND1_REG);
1181         }
1182         // setup any external triggering/pacing (command4 register)
1183         devpriv->command4_bits = 0;
1184         if (cmd->convert_src != TRIG_EXT)
1185                 devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1186         /* XXX should discard first scan when using interval scanning
1187          * since manual says it is not synced with scan clock */
1188         if (labpc_use_continuous_mode(cmd) == 0) {
1189                 devpriv->command4_bits |= INTERVAL_SCAN_EN_BIT;
1190                 if (cmd->scan_begin_src == TRIG_EXT)
1191                         devpriv->command4_bits |= EXT_SCAN_EN_BIT;
1192         }
1193         // single-ended/differential
1194         if (aref == AREF_DIFF)
1195                 devpriv->command4_bits |= ADC_DIFF_BIT;
1196         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1197
1198         devpriv->write_byte(cmd->chanlist_len,
1199                 dev->iobase + INTERVAL_COUNT_REG);
1200         // load count
1201         devpriv->write_byte(INTERVAL_LOAD_BITS,
1202                 dev->iobase + INTERVAL_LOAD_REG);
1203
1204         if (cmd->convert_src == TRIG_TIMER || cmd->scan_begin_src == TRIG_TIMER) {
1205                 // set up pacing
1206                 labpc_adc_timing(dev, cmd);
1207                 // load counter b0 in mode 3
1208                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1209                         0, devpriv->divisor_b0, 3);
1210                 if (ret < 0) {
1211                         comedi_error(dev, "error loading counter b0");
1212                         return -1;
1213                 }
1214         }
1215         // set up conversion pacing
1216         if (labpc_ai_convert_period(cmd)) {
1217                 // load counter a0 in mode 2
1218                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1219                         0, devpriv->divisor_a0, 2);
1220                 if (ret < 0) {
1221                         comedi_error(dev, "error loading counter a0");
1222                         return -1;
1223                 }
1224         } else
1225                 devpriv->write_byte(INIT_A0_BITS,
1226                         dev->iobase + COUNTER_A_CONTROL_REG);
1227
1228         // set up scan pacing
1229         if (labpc_ai_scan_period(cmd)) {
1230                 // load counter b1 in mode 2
1231                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1232                         1, devpriv->divisor_b1, 2);
1233                 if (ret < 0) {
1234                         comedi_error(dev, "error loading counter b1");
1235                         return -1;
1236                 }
1237         }
1238
1239         labpc_clear_adc_fifo(dev);
1240
1241         // set up dma transfer
1242         if (xfer == isa_dma_transfer) {
1243                 irq_flags = claim_dma_lock();
1244                 disable_dma(devpriv->dma_chan);
1245                 /* clear flip-flop to make sure 2-byte registers for
1246                  * count and address get set correctly */
1247                 clear_dma_ff(devpriv->dma_chan);
1248                 set_dma_addr(devpriv->dma_chan,
1249                         virt_to_bus(devpriv->dma_buffer));
1250                 // set appropriate size of transfer
1251                 devpriv->dma_transfer_size = labpc_suggest_transfer_size(*cmd);
1252                 if (cmd->stop_src == TRIG_COUNT &&
1253                         devpriv->count * sample_size <
1254                         devpriv->dma_transfer_size) {
1255                         devpriv->dma_transfer_size =
1256                                 devpriv->count * sample_size;
1257                 }
1258                 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
1259                 enable_dma(devpriv->dma_chan);
1260                 release_dma_lock(irq_flags);
1261                 // enable board's dma
1262                 devpriv->command3_bits |= DMA_EN_BIT | DMATC_INTR_EN_BIT;
1263         } else
1264                 devpriv->command3_bits &= ~DMA_EN_BIT & ~DMATC_INTR_EN_BIT;
1265
1266         // enable error interrupts
1267         devpriv->command3_bits |= ERR_INTR_EN_BIT;
1268         // enable fifo not empty interrupt?
1269         if (xfer == fifo_not_empty_transfer)
1270                 devpriv->command3_bits |= ADC_FNE_INTR_EN_BIT;
1271         else
1272                 devpriv->command3_bits &= ~ADC_FNE_INTR_EN_BIT;
1273         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1274
1275         // startup aquisition
1276
1277         // command2 reg
1278         // use 2 cascaded counters for pacing
1279         comedi_spin_lock_irqsave(&dev->spinlock, flags);
1280         devpriv->command2_bits |= CASCADE_BIT;
1281         switch (cmd->start_src) {
1282         case TRIG_EXT:
1283                 devpriv->command2_bits |= HWTRIG_BIT;
1284                 devpriv->command2_bits &= ~PRETRIG_BIT & ~SWTRIG_BIT;
1285                 break;
1286         case TRIG_NOW:
1287                 devpriv->command2_bits |= SWTRIG_BIT;
1288                 devpriv->command2_bits &= ~PRETRIG_BIT & ~HWTRIG_BIT;
1289                 break;
1290         default:
1291                 comedi_error(dev, "bug with start_src");
1292                 return -1;
1293                 break;
1294         }
1295         switch (cmd->stop_src) {
1296         case TRIG_EXT:
1297                 devpriv->command2_bits |= HWTRIG_BIT | PRETRIG_BIT;
1298                 break;
1299         case TRIG_COUNT:
1300         case TRIG_NONE:
1301                 break;
1302         default:
1303                 comedi_error(dev, "bug with stop_src");
1304                 return -1;
1305         }
1306         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1307         comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1308
1309         return 0;
1310 }
1311
1312 /* interrupt service routine */
1313 static irqreturn_t labpc_interrupt(int irq, void *d PT_REGS_ARG)
1314 {
1315         comedi_device *dev = d;
1316         comedi_subdevice *s = dev->read_subdev;
1317         comedi_async *async;
1318         comedi_cmd *cmd;
1319
1320         if (dev->attached == 0) {
1321                 comedi_error(dev, "premature interrupt");
1322                 return IRQ_HANDLED;
1323         }
1324
1325         async = s->async;
1326         cmd = &async->cmd;
1327         async->events = 0;
1328
1329         // read board status
1330         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1331         if (thisboard->register_layout == labpc_1200_layout)
1332                 devpriv->status2_bits =
1333                         devpriv->read_byte(dev->iobase + STATUS2_REG);
1334
1335         if ((devpriv->status1_bits & (DMATC_BIT | TIMER_BIT | OVERFLOW_BIT |
1336                                 OVERRUN_BIT | DATA_AVAIL_BIT)) == 0
1337                 && (devpriv->status2_bits & A1_TC_BIT) == 0
1338                 && (devpriv->status2_bits & FNHF_BIT)) {
1339                 return IRQ_NONE;
1340         }
1341
1342         if (devpriv->status1_bits & OVERRUN_BIT) {
1343                 // clear error interrupt
1344                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1345                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1346                 comedi_event(dev, s);
1347                 comedi_error(dev, "overrun");
1348                 return IRQ_HANDLED;
1349         }
1350
1351         if (devpriv->current_transfer == isa_dma_transfer) {
1352                 // if a dma terminal count of external stop trigger has occurred
1353                 if (devpriv->status1_bits & DMATC_BIT ||
1354                         (thisboard->register_layout == labpc_1200_layout
1355                                 && devpriv->status2_bits & A1_TC_BIT)) {
1356                         handle_isa_dma(dev);
1357                 }
1358         } else
1359                 labpc_drain_fifo(dev);
1360
1361         if (devpriv->status1_bits & TIMER_BIT) {
1362                 comedi_error(dev, "handled timer interrupt?");
1363                 // clear it
1364                 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1365         }
1366
1367         if (devpriv->status1_bits & OVERFLOW_BIT) {
1368                 // clear error interrupt
1369                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1370                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1371                 comedi_event(dev, s);
1372                 comedi_error(dev, "overflow");
1373                 return IRQ_HANDLED;
1374         }
1375         // handle external stop trigger
1376         if (cmd->stop_src == TRIG_EXT) {
1377                 if (devpriv->status2_bits & A1_TC_BIT) {
1378                         labpc_drain_dregs(dev);
1379                         labpc_cancel(dev, s);
1380                         async->events |= COMEDI_CB_EOA;
1381                 }
1382         }
1383
1384         /* TRIG_COUNT end of acquisition */
1385         if (cmd->stop_src == TRIG_COUNT) {
1386                 if (devpriv->count == 0) {
1387                         labpc_cancel(dev, s);
1388                         async->events |= COMEDI_CB_EOA;
1389                 }
1390         }
1391
1392         comedi_event(dev, s);
1393         return IRQ_HANDLED;
1394 }
1395
1396 // read all available samples from ai fifo
1397 static int labpc_drain_fifo(comedi_device * dev)
1398 {
1399         unsigned int lsb, msb;
1400         sampl_t data;
1401         comedi_async *async = dev->read_subdev->async;
1402         const int timeout = 10000;
1403         unsigned int i;
1404
1405         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1406
1407         for (i = 0; (devpriv->status1_bits & DATA_AVAIL_BIT) && i < timeout;
1408                 i++) {
1409                 // quit if we have all the data we want
1410                 if (async->cmd.stop_src == TRIG_COUNT) {
1411                         if (devpriv->count == 0)
1412                                 break;
1413                         devpriv->count--;
1414                 }
1415                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1416                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1417                 data = (msb << 8) | lsb;
1418                 cfc_write_to_buffer(dev->read_subdev, data);
1419                 devpriv->status1_bits =
1420                         devpriv->read_byte(dev->iobase + STATUS1_REG);
1421         }
1422         if (i == timeout) {
1423                 comedi_error(dev, "ai timeout, fifo never empties");
1424                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1425                 return -1;
1426         }
1427
1428         return 0;
1429 }
1430
1431 static void labpc_drain_dma(comedi_device * dev)
1432 {
1433         comedi_subdevice *s = dev->read_subdev;
1434         comedi_async *async = s->async;
1435         int status;
1436         unsigned long flags;
1437         unsigned int max_points, num_points, residue, leftover;
1438         int i;
1439
1440         status = devpriv->status1_bits;
1441
1442         flags = claim_dma_lock();
1443         disable_dma(devpriv->dma_chan);
1444         /* clear flip-flop to make sure 2-byte registers for
1445          * count and address get set correctly */
1446         clear_dma_ff(devpriv->dma_chan);
1447
1448         // figure out how many points to read
1449         max_points = devpriv->dma_transfer_size / sample_size;
1450         /* residue is the number of points left to be done on the dma
1451          * transfer.  It should always be zero at this point unless
1452          * the stop_src is set to external triggering.
1453          */
1454         residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1455         num_points = max_points - residue;
1456         if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1457                 num_points = devpriv->count;
1458
1459         // figure out how many points will be stored next time
1460         leftover = 0;
1461         if (async->cmd.stop_src != TRIG_COUNT) {
1462                 leftover = devpriv->dma_transfer_size / sample_size;
1463         } else if (devpriv->count > num_points) {
1464                 leftover = devpriv->count - num_points;
1465                 if (leftover > max_points)
1466                         leftover = max_points;
1467         }
1468
1469         /* write data to comedi buffer */
1470         for (i = 0; i < num_points; i++) {
1471                 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1472         }
1473         if (async->cmd.stop_src == TRIG_COUNT)
1474                 devpriv->count -= num_points;
1475
1476         // set address and count for next transfer
1477         set_dma_addr(devpriv->dma_chan, virt_to_bus(devpriv->dma_buffer));
1478         set_dma_count(devpriv->dma_chan, leftover * sample_size);
1479         release_dma_lock(flags);
1480
1481         async->events |= COMEDI_CB_BLOCK;
1482 }
1483
1484 static void handle_isa_dma(comedi_device * dev)
1485 {
1486         labpc_drain_dma(dev);
1487
1488         enable_dma(devpriv->dma_chan);
1489
1490         // clear dma tc interrupt
1491         devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1492 }
1493
1494 /* makes sure all data aquired by board is transfered to comedi (used
1495  * when aquisition is terminated by stop_src == TRIG_EXT). */
1496 static void labpc_drain_dregs(comedi_device * dev)
1497 {
1498         if (devpriv->current_transfer == isa_dma_transfer)
1499                 labpc_drain_dma(dev);
1500
1501         labpc_drain_fifo(dev);
1502 }
1503
1504 static int labpc_ai_rinsn(comedi_device * dev, comedi_subdevice * s,
1505         comedi_insn * insn, lsampl_t * data)
1506 {
1507         int i, n;
1508         int chan, range;
1509         int lsb, msb;
1510         int timeout = 1000;
1511         unsigned long flags;
1512
1513         // disable timed conversions
1514         comedi_spin_lock_irqsave(&dev->spinlock, flags);
1515         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1516         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1517         comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1518
1519         // disable interrupt generation and dma
1520         devpriv->command3_bits = 0;
1521         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1522
1523         /* set gain and channel */
1524         devpriv->command1_bits = 0;
1525         chan = CR_CHAN(insn->chanspec);
1526         range = CR_RANGE(insn->chanspec);
1527         devpriv->command1_bits |= thisboard->ai_range_code[range];
1528         // munge channel bits for differential/scan disabled mode
1529         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1530                 chan *= 2;
1531         devpriv->command1_bits |= ADC_CHAN_BITS(chan);
1532         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1533
1534         // setup command6 register for 1200 boards
1535         if (thisboard->register_layout == labpc_1200_layout) {
1536                 // reference inputs to ground or common?
1537                 if (CR_AREF(insn->chanspec) != AREF_GROUND)
1538                         devpriv->command6_bits |= ADC_COMMON_BIT;
1539                 else
1540                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1541                 // bipolar or unipolar range?
1542                 if (thisboard->ai_range_is_unipolar[range])
1543                         devpriv->command6_bits |= ADC_UNIP_BIT;
1544                 else
1545                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1546                 // don't interrupt on fifo half full
1547                 devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1548                 // don't enable interrupt on counter a1 terminal count?
1549                 devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1550                 // write to register
1551                 devpriv->write_byte(devpriv->command6_bits,
1552                         dev->iobase + COMMAND6_REG);
1553         }
1554         // setup command4 register
1555         devpriv->command4_bits = 0;
1556         devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1557         // single-ended/differential
1558         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1559                 devpriv->command4_bits |= ADC_DIFF_BIT;
1560         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1561
1562         // initialize pacer counter output to make sure it doesn't cause any problems
1563         devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
1564
1565         labpc_clear_adc_fifo(dev);
1566
1567         for (n = 0; n < insn->n; n++) {
1568                 /* trigger conversion */
1569                 devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
1570
1571                 for (i = 0; i < timeout; i++) {
1572                         if (devpriv->read_byte(dev->iobase +
1573                                         STATUS1_REG) & DATA_AVAIL_BIT)
1574                                 break;
1575                         comedi_udelay(1);
1576                 }
1577                 if (i == timeout) {
1578                         comedi_error(dev, "timeout");
1579                         return -ETIME;
1580                 }
1581                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1582                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1583                 data[n] = (msb << 8) | lsb;
1584         }
1585
1586         return n;
1587 }
1588
1589 // analog output insn
1590 static int labpc_ao_winsn(comedi_device * dev, comedi_subdevice * s,
1591         comedi_insn * insn, lsampl_t * data)
1592 {
1593         int channel, range;
1594         unsigned long flags;
1595         int lsb, msb;
1596
1597         if (insn->n == 0)
1598                 return 0;
1599
1600         channel = CR_CHAN(insn->chanspec);
1601
1602         // turn off pacing of analog output channel
1603         /* note: hardware bug in daqcard-1200 means pacing cannot
1604          * be independently enabled/disabled for its the two channels */
1605         comedi_spin_lock_irqsave(&dev->spinlock, flags);
1606         devpriv->command2_bits &= ~DAC_PACED_BIT(channel);
1607         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1608         comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1609
1610         // set range
1611         if (thisboard->register_layout == labpc_1200_layout) {
1612                 range = CR_RANGE(insn->chanspec);
1613                 if (range & AO_RANGE_IS_UNIPOLAR)
1614                         devpriv->command6_bits |= DAC_UNIP_BIT(channel);
1615                 else
1616                         devpriv->command6_bits &= ~DAC_UNIP_BIT(channel);
1617                 // write to register
1618                 devpriv->write_byte(devpriv->command6_bits,
1619                         dev->iobase + COMMAND6_REG);
1620         }
1621         // send data
1622         lsb = data[0] & 0xff;
1623         msb = (data[0] >> 8) & 0xff;
1624         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1625         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1626
1627         // remember value for readback
1628         devpriv->ao_value[channel] = data[0];
1629
1630         return 1;
1631 }
1632
1633 // analog output readback insn
1634 static int labpc_ao_rinsn(comedi_device * dev, comedi_subdevice * s,
1635         comedi_insn * insn, lsampl_t * data)
1636 {
1637         if (insn->n == 0)
1638                 return 0;
1639
1640         data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1641
1642         return 1;
1643 }
1644
1645 static int labpc_calib_read_insn(comedi_device * dev, comedi_subdevice * s,
1646         comedi_insn * insn, lsampl_t * data)
1647 {
1648         if (insn->n == 0)
1649                 return 0;
1650
1651         data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)];
1652
1653         return 1;
1654 }
1655
1656 static int labpc_calib_write_insn(comedi_device * dev, comedi_subdevice * s,
1657         comedi_insn * insn, lsampl_t * data)
1658 {
1659         int channel = CR_CHAN(insn->chanspec);
1660
1661         if (insn->n == 0)
1662                 return 0;
1663
1664         write_caldac(dev, channel, data[0]);
1665         return 1;
1666 }
1667
1668 static int labpc_eeprom_read_insn(comedi_device * dev, comedi_subdevice * s,
1669         comedi_insn * insn, lsampl_t * data)
1670 {
1671         if (insn->n == 0)
1672                 return 0;
1673
1674         data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)];
1675
1676         return 1;
1677 }
1678
1679 static int labpc_eeprom_write_insn(comedi_device * dev, comedi_subdevice * s,
1680         comedi_insn * insn, lsampl_t * data)
1681 {
1682         int channel = CR_CHAN(insn->chanspec);
1683         int ret;
1684
1685         // only allow writes to user area of eeprom
1686         if (channel < 16 || channel > 127) {
1687                 printk("eeprom writes are only allowed to channels 16 through 127 (the pointer and user areas)");
1688                 return -EINVAL;
1689         }
1690
1691         if (insn->n == 0)
1692                 return 0;
1693
1694         ret = labpc_eeprom_write(dev, channel, data[0]);
1695         if (ret < 0)
1696                 return ret;
1697
1698         return 1;
1699 }
1700
1701 // utility function that suggests a dma transfer size in bytes
1702 static unsigned int labpc_suggest_transfer_size(comedi_cmd cmd)
1703 {
1704         unsigned int size;
1705         unsigned int freq;
1706
1707         if (cmd.convert_src == TRIG_TIMER)
1708                 freq = 1000000000 / cmd.convert_arg;
1709         // return some default value
1710         else
1711                 freq = 0xffffffff;
1712
1713         // make buffer fill in no more than 1/3 second
1714         size = (freq / 3) * sample_size;
1715
1716         // set a minimum and maximum size allowed
1717         if (size > dma_buffer_size)
1718                 size = dma_buffer_size - dma_buffer_size % sample_size;
1719         else if (size < sample_size)
1720                 size = sample_size;
1721
1722         return size;
1723 }
1724
1725 // figures out what counter values to use based on command
1726 static void labpc_adc_timing(comedi_device * dev, comedi_cmd * cmd)
1727 {
1728         const int max_counter_value = 0x10000;  // max value for 16 bit counter in mode 2
1729         const int min_counter_value = 2;        // min value for 16 bit counter in mode 2
1730         unsigned int base_period;
1731
1732         // if both convert and scan triggers are TRIG_TIMER, then they both rely on counter b0
1733         if (labpc_ai_convert_period(cmd) && labpc_ai_scan_period(cmd)) {
1734                 // pick the lowest b0 divisor value we can (for maximum input clock speed on convert and scan counters)
1735                 devpriv->divisor_b0 = (labpc_ai_scan_period(cmd) - 1) /
1736                         (LABPC_TIMER_BASE * max_counter_value) + 1;
1737                 if (devpriv->divisor_b0 < min_counter_value)
1738                         devpriv->divisor_b0 = min_counter_value;
1739                 if (devpriv->divisor_b0 > max_counter_value)
1740                         devpriv->divisor_b0 = max_counter_value;
1741
1742                 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
1743
1744                 // set a0 for conversion frequency and b1 for scan frequency
1745                 switch (cmd->flags & TRIG_ROUND_MASK) {
1746                 default:
1747                 case TRIG_ROUND_NEAREST:
1748                         devpriv->divisor_a0 =
1749                                 (labpc_ai_convert_period(cmd) +
1750                                 (base_period / 2)) / base_period;
1751                         devpriv->divisor_b1 =
1752                                 (labpc_ai_scan_period(cmd) +
1753                                 (base_period / 2)) / base_period;
1754                         break;
1755                 case TRIG_ROUND_UP:
1756                         devpriv->divisor_a0 =
1757                                 (labpc_ai_convert_period(cmd) + (base_period -
1758                                         1)) / base_period;
1759                         devpriv->divisor_b1 =
1760                                 (labpc_ai_scan_period(cmd) + (base_period -
1761                                         1)) / base_period;
1762                         break;
1763                 case TRIG_ROUND_DOWN:
1764                         devpriv->divisor_a0 =
1765                                 labpc_ai_convert_period(cmd) / base_period;
1766                         devpriv->divisor_b1 =
1767                                 labpc_ai_scan_period(cmd) / base_period;
1768                         break;
1769                 }
1770                 // make sure a0 and b1 values are acceptable
1771                 if (devpriv->divisor_a0 < min_counter_value)
1772                         devpriv->divisor_a0 = min_counter_value;
1773                 if (devpriv->divisor_a0 > max_counter_value)
1774                         devpriv->divisor_a0 = max_counter_value;
1775                 if (devpriv->divisor_b1 < min_counter_value)
1776                         devpriv->divisor_b1 = min_counter_value;
1777                 if (devpriv->divisor_b1 > max_counter_value)
1778                         devpriv->divisor_b1 = max_counter_value;
1779                 // write corrected timings to command
1780                 labpc_set_ai_convert_period(cmd,
1781                         base_period * devpriv->divisor_a0);
1782                 labpc_set_ai_scan_period(cmd,
1783                         base_period * devpriv->divisor_b1);
1784                 // if only one TRIG_TIMER is used, we can employ the generic cascaded timing functions
1785         } else if (labpc_ai_scan_period(cmd)) {
1786                 unsigned int scan_period;
1787
1788                 scan_period = labpc_ai_scan_period(cmd);
1789                 /* calculate cascaded counter values that give desired scan timing */
1790                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1791                         &(devpriv->divisor_b1), &(devpriv->divisor_b0),
1792                         &scan_period, cmd->flags & TRIG_ROUND_MASK);
1793                 labpc_set_ai_scan_period(cmd, scan_period);
1794         } else if (labpc_ai_convert_period(cmd)) {
1795                 unsigned int convert_period;
1796
1797                 convert_period = labpc_ai_convert_period(cmd);
1798                 /* calculate cascaded counter values that give desired conversion timing */
1799                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1800                         &(devpriv->divisor_a0), &(devpriv->divisor_b0),
1801                         &convert_period, cmd->flags & TRIG_ROUND_MASK);
1802                 labpc_set_ai_convert_period(cmd, convert_period);
1803         }
1804 }
1805
1806 static int labpc_dio_mem_callback(int dir, int port, int data,
1807         unsigned long iobase)
1808 {
1809         if (dir) {
1810                 writeb(data, (void *)(iobase + port));
1811                 return 0;
1812         } else {
1813                 return readb((void *)(iobase + port));
1814         }
1815 }
1816
1817 // lowlevel write to eeprom/dac
1818 static void labpc_serial_out(comedi_device * dev, unsigned int value,
1819         unsigned int value_width)
1820 {
1821         int i;
1822
1823         for (i = 1; i <= value_width; i++) {
1824                 // clear serial clock
1825                 devpriv->command5_bits &= ~SCLOCK_BIT;
1826                 // send bits most significant bit first
1827                 if (value & (1 << (value_width - i)))
1828                         devpriv->command5_bits |= SDATA_BIT;
1829                 else
1830                         devpriv->command5_bits &= ~SDATA_BIT;
1831                 comedi_udelay(1);
1832                 devpriv->write_byte(devpriv->command5_bits,
1833                         dev->iobase + COMMAND5_REG);
1834                 // set clock to load bit
1835                 devpriv->command5_bits |= SCLOCK_BIT;
1836                 comedi_udelay(1);
1837                 devpriv->write_byte(devpriv->command5_bits,
1838                         dev->iobase + COMMAND5_REG);
1839         }
1840 }
1841
1842 // lowlevel read from eeprom
1843 static unsigned int labpc_serial_in(comedi_device * dev)
1844 {
1845         unsigned int value = 0;
1846         int i;
1847         const int value_width = 8;      // number of bits wide values are
1848
1849         for (i = 1; i <= value_width; i++) {
1850                 // set serial clock
1851                 devpriv->command5_bits |= SCLOCK_BIT;
1852                 comedi_udelay(1);
1853                 devpriv->write_byte(devpriv->command5_bits,
1854                         dev->iobase + COMMAND5_REG);
1855                 // clear clock bit
1856                 devpriv->command5_bits &= ~SCLOCK_BIT;
1857                 comedi_udelay(1);
1858                 devpriv->write_byte(devpriv->command5_bits,
1859                         dev->iobase + COMMAND5_REG);
1860                 // read bits most significant bit first
1861                 comedi_udelay(1);
1862                 devpriv->status2_bits =
1863                         devpriv->read_byte(dev->iobase + STATUS2_REG);
1864                 if (devpriv->status2_bits & EEPROM_OUT_BIT) {
1865                         value |= 1 << (value_width - i);
1866                 }
1867         }
1868
1869         return value;
1870 }
1871
1872 static unsigned int labpc_eeprom_read(comedi_device * dev, unsigned int address)
1873 {
1874         unsigned int value;
1875         const int read_instruction = 0x3;       // bits to tell eeprom to expect a read
1876         const int write_length = 8;     // 8 bit write lengths to eeprom
1877
1878         // enable read/write to eeprom
1879         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1880         comedi_udelay(1);
1881         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1882         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1883         comedi_udelay(1);
1884         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1885
1886         // send read instruction
1887         labpc_serial_out(dev, read_instruction, write_length);
1888         // send 8 bit address to read from
1889         labpc_serial_out(dev, address, write_length);
1890         // read result
1891         value = labpc_serial_in(dev);
1892
1893         // disable read/write to eeprom
1894         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1895         comedi_udelay(1);
1896         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1897
1898         return value;
1899 }
1900
1901 static unsigned int labpc_eeprom_write(comedi_device * dev,
1902         unsigned int address, unsigned int value)
1903 {
1904         const int write_enable_instruction = 0x6;
1905         const int write_instruction = 0x2;
1906         const int write_length = 8;     // 8 bit write lengths to eeprom
1907         const int write_in_progress_bit = 0x1;
1908         const int timeout = 10000;
1909         int i;
1910
1911         // make sure there isn't already a write in progress
1912         for (i = 0; i < timeout; i++) {
1913                 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
1914                         0)
1915                         break;
1916         }
1917         if (i == timeout) {
1918                 comedi_error(dev, "eeprom write timed out");
1919                 return -ETIME;
1920         }
1921         // update software copy of eeprom
1922         devpriv->eeprom_data[address] = value;
1923
1924         // enable read/write to eeprom
1925         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1926         comedi_udelay(1);
1927         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1928         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1929         comedi_udelay(1);
1930         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1931
1932         // send write_enable instruction
1933         labpc_serial_out(dev, write_enable_instruction, write_length);
1934         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1935         comedi_udelay(1);
1936         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1937
1938         // send write instruction
1939         devpriv->command5_bits |= EEPROM_EN_BIT;
1940         comedi_udelay(1);
1941         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1942         labpc_serial_out(dev, write_instruction, write_length);
1943         // send 8 bit address to write to
1944         labpc_serial_out(dev, address, write_length);
1945         // write value
1946         labpc_serial_out(dev, value, write_length);
1947         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1948         comedi_udelay(1);
1949         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1950
1951         // disable read/write to eeprom
1952         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1953         comedi_udelay(1);
1954         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1955
1956         return 0;
1957 }
1958
1959 static unsigned int labpc_eeprom_read_status(comedi_device * dev)
1960 {
1961         unsigned int value;
1962         const int read_status_instruction = 0x5;
1963         const int write_length = 8;     // 8 bit write lengths to eeprom
1964
1965         // enable read/write to eeprom
1966         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1967         comedi_udelay(1);
1968         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1969         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1970         comedi_udelay(1);
1971         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1972
1973         // send read status instruction
1974         labpc_serial_out(dev, read_status_instruction, write_length);
1975         // read result
1976         value = labpc_serial_in(dev);
1977
1978         // disable read/write to eeprom
1979         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1980         comedi_udelay(1);
1981         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1982
1983         return value;
1984 }
1985
1986 // writes to 8 bit calibration dacs
1987 static void write_caldac(comedi_device * dev, unsigned int channel,
1988         unsigned int value)
1989 {
1990         if (value == devpriv->caldac[channel])
1991                 return;
1992         devpriv->caldac[channel] = value;
1993
1994         // clear caldac load bit and make sure we don't write to eeprom
1995         devpriv->command5_bits &=
1996                 ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1997         comedi_udelay(1);
1998         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1999
2000         // write 4 bit channel
2001         labpc_serial_out(dev, channel, 4);
2002         // write 8 bit caldac value
2003         labpc_serial_out(dev, value, 8);
2004
2005         // set and clear caldac bit to load caldac value
2006         devpriv->command5_bits |= CALDAC_LOAD_BIT;
2007         comedi_udelay(1);
2008         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2009         devpriv->command5_bits &= ~CALDAC_LOAD_BIT;
2010         comedi_udelay(1);
2011         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2012 }
2013
2014 #ifdef CONFIG_COMEDI_PCI
2015 COMEDI_PCI_INITCLEANUP(driver_labpc, labpc_pci_table);
2016 #else
2017 COMEDI_INITCLEANUP(driver_labpc);
2018 #endif
2019
2020 EXPORT_SYMBOL_GPL(labpc_common_attach);
2021 EXPORT_SYMBOL_GPL(labpc_common_detach);
2022 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
2023 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
2024 EXPORT_SYMBOL_GPL(labpc_1200_is_unipolar);