comedi/drivers/ni_labpc.c

   1 /*
   2     comedi/drivers/ni_labpc.c
   3     Driver for National Instruments Lab-PC series boards and compatibles
   4     Copyright (C) 2001, 2002, 2003 Frank Mori Hess <fmhess@users.sourceforge.net>
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19
  20 ************************************************************************
  21 */
  22 /*
  23 Driver: ni_labpc
  24 Description: National Instruments Lab-PC (& compatibles)
  25 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
  26 Devices: [National Instruments] Lab-PC-1200 (labpc-1200),
  27   Lab-PC-1200AI (labpc-1200ai), Lab-PC+ (lab-pc+), PCI-1200 (ni_labpc)
  28 Status: works
  29
  30 Tested with lab-pc-1200.  For the older Lab-PC+, not all input ranges
  31 and analog references will work, the available ranges/arefs will
  32 depend on how you have configured the jumpers on your board
  33 (see your owner's manual).
  34
  35 Kernel-level ISA plug-and-play support for the lab-pc-1200
  36 boards has not
  37 yet been added to the driver, mainly due to the fact that
  38 I don't know the device id numbers.  If you have one
  39 of these boards,
  40 please file a bug report at https://bugs.comedi.org/
  41 so I can get the necessary information from you.
  42
  43 The 1200 series boards have onboard calibration dacs for correcting
  44 analog input/output offsets and gains.  The proper settings for these
  45 caldacs are stored on the board's eeprom.  To read the caldac values
  46 from the eeprom and store them into a file that can be then be used by
  47 comedilib, use the comedi_calibrate program.
  48
  49 Configuration options - ISA boards:
  50   [0] - I/O port base address
  51   [1] - IRQ (optional, required for timed or externally triggered conversions)
  52   [2] - DMA channel (optional)
  53
  54 Configuration options - PCI boards:
  55   [0] - bus (optional)
  56   [1] - slot (optional)
  57
  58 The Lab-pc+ has quirky chanlist requirements
  59 when scanning multiple channels.  Multiple channel scan
  60 sequence must start at highest channel, then decrement down to
  61 channel 0.  The rest of the cards can scan down like lab-pc+ or scan
  62 up from channel zero.  Chanlists consisting of all one channel
  63 are also legal, and allow you to pace conversions in bursts.
  64
  65 */
  66
  67 /*
  68
  69 NI manuals:
  70 341309a (labpc-1200 register manual)
  71 340914a (pci-1200)
  72 320502b (lab-pc+)
  73
  74 */
  75
  76 #undef LABPC_DEBUG
  77 //#define LABPC_DEBUG   // enable debugging messages
  78
  79 #include <linux/comedidev.h>
  80
  81 #include <linux/delay.h>
  82 #include <asm/dma.h>
  83
  84 #include "8253.h"
  85 #include "8255.h"
  86 #include "mite.h"
  87 #include "comedi_fc.h"
  88 #include "ni_labpc.h"
  89
  90 #define DRV_NAME "ni_labpc"
  91
  92 #define LABPC_SIZE           32 // size of io region used by board
  93 #define LABPC_TIMER_BASE            500 // 2 MHz master clock
  94
  95 /* Registers for the lab-pc+ */
  96
  97 //write-only registers
  98 #define COMMAND1_REG    0x0
  99 #define   ADC_GAIN_MASK (0x7 << 4)
 100 #define   ADC_CHAN_BITS(x)      ((x) & 0x7)
 101 #define   ADC_SCAN_EN_BIT       0x80    // enables multi channel scans
 102 #define COMMAND2_REG    0x1
 103 #define   PRETRIG_BIT   0x1     // enable pretriggering (used in conjunction with SWTRIG)
 104 #define   HWTRIG_BIT    0x2     // enable paced conversions on external trigger
 105 #define   SWTRIG_BIT    0x4     // enable paced conversions
 106 #define   CASCADE_BIT   0x8     // use two cascaded counters for pacing
 107 #define   DAC_PACED_BIT(channel)        (0x40 << ((channel) & 0x1))
 108 #define COMMAND3_REG    0x2
 109 #define   DMA_EN_BIT    0x1     // enable dma transfers
 110 #define   DIO_INTR_EN_BIT       0x2     // enable interrupts for 8255
 111 #define   DMATC_INTR_EN_BIT     0x4     // enable dma terminal count interrupt
 112 #define   TIMER_INTR_EN_BIT     0x8     // enable timer interrupt
 113 #define   ERR_INTR_EN_BIT       0x10    // enable error interrupt
 114 #define   ADC_FNE_INTR_EN_BIT   0x20    // enable fifo not empty interrupt
 115 #define ADC_CONVERT_REG 0x3
 116 #define DAC_LSB_REG(channel)    (0x4 + 2 * ((channel) & 0x1))
 117 #define DAC_MSB_REG(channel)    (0x5 + 2 * ((channel) & 0x1))
 118 #define ADC_CLEAR_REG   0x8
 119 #define DMATC_CLEAR_REG 0xa
 120 #define TIMER_CLEAR_REG 0xc
 121 #define COMMAND6_REG    0xe     // 1200 boards only
 122 #define   ADC_COMMON_BIT        0x1     // select ground or common-mode reference
 123 #define   ADC_UNIP_BIT  0x2     // adc unipolar
 124 #define   DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1))      // dac unipolar
 125 #define   ADC_FHF_INTR_EN_BIT   0x20    // enable fifo half full interrupt
 126 #define   A1_INTR_EN_BIT        0x40    // enable interrupt on end of hardware count
 127 #define   ADC_SCAN_UP_BIT 0x80  // scan up from channel zero instead of down to zero
 128 #define COMMAND4_REG    0xf
 129 #define   INTERVAL_SCAN_EN_BIT  0x1     // enables 'interval' scanning
 130 #define   EXT_SCAN_EN_BIT       0x2     // enables external signal on counter b1 output to trigger scan
 131 #define   EXT_CONVERT_OUT_BIT   0x4     // chooses direction (output or input) for EXTCONV* line
 132 #define   ADC_DIFF_BIT  0x8     // chooses differential inputs for adc (in conjunction with board jumper)
 133 #define   EXT_CONVERT_DISABLE_BIT       0x10
 134 #define COMMAND5_REG    0x1c    // 1200 boards only, calibration stuff
 135 #define   EEPROM_WRITE_UNPROTECT_BIT    0x4     // enable eeprom for write
 136 #define   DITHER_EN_BIT 0x8     // enable dithering
 137 #define   CALDAC_LOAD_BIT       0x10    // load calibration dac
 138 #define   SCLOCK_BIT    0x20    // serial clock - rising edge writes, falling edge reads
 139 #define   SDATA_BIT     0x40    // serial data bit for writing to eeprom or calibration dacs
 140 #define   EEPROM_EN_BIT 0x80    // enable eeprom for read/write
 141 #define INTERVAL_COUNT_REG      0x1e
 142 #define INTERVAL_LOAD_REG       0x1f
 143 #define   INTERVAL_LOAD_BITS    0x1
 144
 145 // read-only registers
 146 #define STATUS1_REG     0x0
 147 #define   DATA_AVAIL_BIT        0x1     // data is available in fifo
 148 #define   OVERRUN_BIT   0x2     // overrun has occurred
 149 #define   OVERFLOW_BIT  0x4     // fifo overflow
 150 #define   TIMER_BIT     0x8     // timer interrupt has occured
 151 #define   DMATC_BIT     0x10    // dma terminal count has occured
 152 #define   EXT_TRIG_BIT  0x40    // external trigger has occured
 153 #define STATUS2_REG     0x1d    // 1200 boards only
 154 #define   EEPROM_OUT_BIT        0x1     // programmable eeprom serial output
 155 #define   A1_TC_BIT     0x2     // counter A1 terminal count
 156 #define   FNHF_BIT      0x4     // fifo not half full
 157 #define ADC_FIFO_REG    0xa
 158
 159 #define DIO_BASE_REG    0x10
 160 #define COUNTER_A_BASE_REG      0x14
 161 #define COUNTER_A_CONTROL_REG   (COUNTER_A_BASE_REG + 0x3)
 162 #define   INIT_A0_BITS  0x14    // check modes put conversion pacer output in harmless state (a0 mode 2)
 163 #define   INIT_A1_BITS  0x70    // put hardware conversion counter output in harmless state (a1 mode 0)
 164 #define COUNTER_B_BASE_REG      0x18
 165
 166 static int labpc_attach(comedi_device * dev, comedi_devconfig * it);
 167 static int labpc_cancel(comedi_device * dev, comedi_subdevice * s);
 168 static irqreturn_t labpc_interrupt(int irq, void *d PT_REGS_ARG);
 169 static int labpc_drain_fifo(comedi_device * dev);
 170 static void labpc_drain_dma(comedi_device * dev);
 171 static void handle_isa_dma(comedi_device * dev);
 172 static void labpc_drain_dregs(comedi_device * dev);
 173 static int labpc_ai_cmdtest(comedi_device * dev, comedi_subdevice * s,
 174         comedi_cmd * cmd);
 175 static int labpc_ai_cmd(comedi_device * dev, comedi_subdevice * s);
 176 static int labpc_ai_rinsn(comedi_device * dev, comedi_subdevice * s,
 177         comedi_insn * insn, lsampl_t * data);
 178 static int labpc_ao_winsn(comedi_device * dev, comedi_subdevice * s,
 179         comedi_insn * insn, lsampl_t * data);
 180 static int labpc_ao_rinsn(comedi_device * dev, comedi_subdevice * s,
 181         comedi_insn * insn, lsampl_t * data);
 182 static int labpc_calib_read_insn(comedi_device * dev, comedi_subdevice * s,
 183         comedi_insn * insn, lsampl_t * data);
 184 static int labpc_calib_write_insn(comedi_device * dev, comedi_subdevice * s,
 185         comedi_insn * insn, lsampl_t * data);
 186 static int labpc_eeprom_read_insn(comedi_device * dev, comedi_subdevice * s,
 187         comedi_insn * insn, lsampl_t * data);
 188 static int labpc_eeprom_write_insn(comedi_device * dev, comedi_subdevice * s,
 189         comedi_insn * insn, lsampl_t * data);
 190 static unsigned int labpc_suggest_transfer_size(comedi_cmd cmd);
 191 static void labpc_adc_timing(comedi_device * dev, comedi_cmd * cmd);
 192 #ifdef CONFIG_COMEDI_PCI
 193 static int labpc_find_device(comedi_device *dev, int bus, int slot);
 194 #endif
 195 static int labpc_dio_mem_callback(int dir, int port, int data,
 196         unsigned long arg);
 197 static void labpc_serial_out(comedi_device * dev, unsigned int value,
 198         unsigned int num_bits);
 199 static unsigned int labpc_serial_in(comedi_device * dev);
 200 static unsigned int labpc_eeprom_read(comedi_device * dev,
 201         unsigned int address);
 202 static unsigned int labpc_eeprom_read_status(comedi_device * dev);
 203 static unsigned int labpc_eeprom_write(comedi_device * dev,
 204         unsigned int address, unsigned int value);
 205 static void write_caldac(comedi_device * dev, unsigned int channel,
 206         unsigned int value);
 207
 208 enum scan_mode {
 209         MODE_SINGLE_CHAN,
 210         MODE_SINGLE_CHAN_INTERVAL,
 211         MODE_MULT_CHAN_UP,
 212         MODE_MULT_CHAN_DOWN,
 213 };
 214
 215 //analog input ranges
 216 #define NUM_LABPC_PLUS_AI_RANGES 16
 217 // indicates unipolar ranges
 218 static const int labpc_plus_is_unipolar[NUM_LABPC_PLUS_AI_RANGES] = {
 219         0,
 220         0,
 221         0,
 222         0,
 223         0,
 224         0,
 225         0,
 226         0,
 227         1,
 228         1,
 229         1,
 230         1,
 231         1,
 232         1,
 233         1,
 234         1,
 235 };
 236
 237 // map range index to gain bits
 238 static const int labpc_plus_ai_gain_bits[NUM_LABPC_PLUS_AI_RANGES] = {
 239         0x00,
 240         0x10,
 241         0x20,
 242         0x30,
 243         0x40,
 244         0x50,
 245         0x60,
 246         0x70,
 247         0x00,
 248         0x10,
 249         0x20,
 250         0x30,
 251         0x40,
 252         0x50,
 253         0x60,
 254         0x70,
 255 };
 256 static const comedi_lrange range_labpc_plus_ai = {
 257         NUM_LABPC_PLUS_AI_RANGES,
 258         {
 259                         BIP_RANGE(5),
 260                         BIP_RANGE(4),
 261                         BIP_RANGE(2.5),
 262                         BIP_RANGE(1),
 263                         BIP_RANGE(0.5),
 264                         BIP_RANGE(0.25),
 265                         BIP_RANGE(0.1),
 266                         BIP_RANGE(0.05),
 267                         UNI_RANGE(10),
 268                         UNI_RANGE(8),
 269                         UNI_RANGE(5),
 270                         UNI_RANGE(2),
 271                         UNI_RANGE(1),
 272                         UNI_RANGE(0.5),
 273                         UNI_RANGE(0.2),
 274                         UNI_RANGE(0.1),
 275                 }
 276 };
 277
 278 #define NUM_LABPC_1200_AI_RANGES 14
 279 // indicates unipolar ranges
 280 const int labpc_1200_is_unipolar[NUM_LABPC_1200_AI_RANGES] = {
 281         0,
 282         0,
 283         0,
 284         0,
 285         0,
 286         0,
 287         0,
 288         1,
 289         1,
 290         1,
 291         1,
 292         1,
 293         1,
 294         1,
 295 };
 296
 297 // map range index to gain bits
 298 const int labpc_1200_ai_gain_bits[NUM_LABPC_1200_AI_RANGES] = {
 299         0x00,
 300         0x20,
 301         0x30,
 302         0x40,
 303         0x50,
 304         0x60,
 305         0x70,
 306         0x00,
 307         0x20,
 308         0x30,
 309         0x40,
 310         0x50,
 311         0x60,
 312         0x70,
 313 };
 314 const comedi_lrange range_labpc_1200_ai = {
 315         NUM_LABPC_1200_AI_RANGES,
 316         {
 317                         BIP_RANGE(5),
 318                         BIP_RANGE(2.5),
 319                         BIP_RANGE(1),
 320                         BIP_RANGE(0.5),
 321                         BIP_RANGE(0.25),
 322                         BIP_RANGE(0.1),
 323                         BIP_RANGE(0.05),
 324                         UNI_RANGE(10),
 325                         UNI_RANGE(5),
 326                         UNI_RANGE(2),
 327                         UNI_RANGE(1),
 328                         UNI_RANGE(0.5),
 329                         UNI_RANGE(0.2),
 330                         UNI_RANGE(0.1),
 331                 }
 332 };
 333
 334 //analog output ranges
 335 #define AO_RANGE_IS_UNIPOLAR 0x1
 336 static const comedi_lrange range_labpc_ao = {
 337         2,
 338         {
 339                         BIP_RANGE(5),
 340                         UNI_RANGE(10),
 341                 }
 342 };
 343
 344 /* functions that do inb/outb and readb/writeb so we can use
 345  * function pointers to decide which to use */
 346 static inline unsigned int labpc_inb(unsigned long address)
 347 {
 348         return inb(address);
 349 }
 350 static inline void labpc_outb(unsigned int byte, unsigned long address)
 351 {
 352         outb(byte, address);
 353 }
 354 static inline unsigned int labpc_readb(unsigned long address)
 355 {
 356         return readb((void *)address);
 357 }
 358 static inline void labpc_writeb(unsigned int byte, unsigned long address)
 359 {
 360         writeb(byte, (void *)address);
 361 }
 362
 363 static const labpc_board labpc_boards[] = {
 364         {
 365               name:     "lab-pc-1200",
 366               ai_speed:10000,
 367               bustype:  isa_bustype,
 368               register_layout:labpc_1200_layout,
 369               has_ao:   1,
 370               ai_range_table:&range_labpc_1200_ai,
 371               ai_range_code:labpc_1200_ai_gain_bits,
 372               ai_range_is_unipolar:labpc_1200_is_unipolar,
 373               ai_scan_up:1,
 374               memory_mapped_io:0,
 375                 },
 376         {
 377               name:     "lab-pc-1200ai",
 378               ai_speed:10000,
 379               bustype:  isa_bustype,
 380               register_layout:labpc_1200_layout,
 381               has_ao:   0,
 382               ai_range_table:&range_labpc_1200_ai,
 383               ai_range_code:labpc_1200_ai_gain_bits,
 384               ai_range_is_unipolar:labpc_1200_is_unipolar,
 385               ai_scan_up:1,
 386               memory_mapped_io:0,
 387                 },
 388         {
 389               name:     "lab-pc+",
 390               ai_speed:12000,
 391               bustype:  isa_bustype,
 392               register_layout:labpc_plus_layout,
 393               has_ao:   1,
 394               ai_range_table:&range_labpc_plus_ai,
 395               ai_range_code:labpc_plus_ai_gain_bits,
 396               ai_range_is_unipolar:labpc_plus_is_unipolar,
 397               ai_scan_up:0,
 398               memory_mapped_io:0,
 399                 },
 400 #ifdef CONFIG_COMEDI_PCI
 401         {
 402                 name:   "pci-1200",
 403                 device_id:0x161,
 404                 ai_speed:10000,
 405                 bustype:        pci_bustype,
 406                 register_layout:labpc_1200_layout,
 407                 has_ao: 1,
 408                 ai_range_table:&range_labpc_1200_ai,
 409                 ai_range_code:labpc_1200_ai_gain_bits,
 410                 ai_range_is_unipolar:labpc_1200_is_unipolar,
 411                 ai_scan_up:1,
 412                 memory_mapped_io:1,
 413                 },
 414         // dummy entry so pci board works when comedi_config is passed driver name
 415         {
 416                 .name = DRV_NAME,
 417                 .bustype = pci_bustype,
 418                 },
 419 #endif
 420 };
 421
 422 /*
 423  * Useful for shorthand access to the particular board structure
 424  */
 425 #define thisboard ((labpc_board *)dev->board_ptr)
 426
 427 static const int dma_buffer_size = 0xff00;      // size in bytes of dma buffer
 428 static const int sample_size = 2;       // 2 bytes per sample
 429
 430 #define devpriv ((labpc_private *)dev->private)
 431
 432 static comedi_driver driver_labpc = {
 433         .driver_name = DRV_NAME,
 434         .module = THIS_MODULE,
 435         .attach = labpc_attach,
 436         .detach = labpc_common_detach,
 437         .num_names = sizeof(labpc_boards) / sizeof(labpc_board),
 438         .board_name = &labpc_boards[0].name,
 439         .offset = sizeof(labpc_board),
 440 };
 441
 442 #ifdef CONFIG_COMEDI_PCI
 443 static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
 444         {PCI_VENDOR_ID_NATINST, 0x161, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
 445         {0}
 446 };
 447
 448 MODULE_DEVICE_TABLE(pci, labpc_pci_table);
 449 #endif /* CONFIG_COMEDI_PCI */
 450
 451 static inline int labpc_counter_load(comedi_device * dev,
 452         unsigned long base_address, unsigned int counter_number,
 453         unsigned int count, unsigned int mode)
 454 {
 455         if (thisboard->memory_mapped_io)
 456                 return i8254_mm_load((void *)base_address, 0, counter_number,
 457                         count, mode);
 458         else
 459                 return i8254_load(base_address, 0, counter_number, count, mode);
 460 }
 461
 462 int labpc_common_attach(comedi_device * dev, unsigned long iobase,
 463         unsigned int irq, unsigned int dma_chan)
 464 {
 465         comedi_subdevice *s;
 466         int i;
 467         unsigned long dma_flags, isr_flags;
 468         short lsb, msb;
 469
 470         printk("comedi%d: ni_labpc: %s, io 0x%lx", dev->minor, thisboard->name,
 471                 iobase);
 472         if (irq) {
 473                 printk(", irq %u", irq);
 474         }
 475         if (dma_chan) {
 476                 printk(", dma %u", dma_chan);
 477         }
 478         printk("\n");
 479
 480         if (iobase == 0) {
 481                 printk("io base address is zero!\n");
 482                 return -EINVAL;
 483         }
 484         // request io regions for isa boards
 485         if (thisboard->bustype == isa_bustype) {
 486                 /* check if io addresses are available */
 487                 if (!request_region(iobase, LABPC_SIZE,
 488                                 driver_labpc.driver_name)) {
 489                         printk("I/O port conflict\n");
 490                         return -EIO;
 491                 }
 492         }
 493         dev->iobase = iobase;
 494
 495         if (thisboard->memory_mapped_io) {
 496                 devpriv->read_byte = labpc_readb;
 497                 devpriv->write_byte = labpc_writeb;
 498         } else {
 499                 devpriv->read_byte = labpc_inb;
 500                 devpriv->write_byte = labpc_outb;
 501         }
 502         // initialize board's command registers
 503         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
 504         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 505         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 506         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
 507         if (thisboard->register_layout == labpc_1200_layout) {
 508                 devpriv->write_byte(devpriv->command5_bits,
 509                         dev->iobase + COMMAND5_REG);
 510                 devpriv->write_byte(devpriv->command6_bits,
 511                         dev->iobase + COMMAND6_REG);
 512         }
 513
 514         /* grab our IRQ */
 515         if (irq) {
 516                 isr_flags = 0;
 517                 if (thisboard->bustype == pci_bustype
 518                     || thisboard->bustype == pcmcia_bustype)
 519                         isr_flags |= IRQF_SHARED;
 520                 if (comedi_request_irq(irq, labpc_interrupt, isr_flags,
 521                                 driver_labpc.driver_name, dev)) {
 522                         printk("unable to allocate irq %u\n", irq);
 523                         return -EINVAL;
 524                 }
 525         }
 526         dev->irq = irq;
 527
 528         // grab dma channel
 529         if (dma_chan > 3) {
 530                 printk(" invalid dma channel %u\n", dma_chan);
 531                 return -EINVAL;
 532         } else if (dma_chan) {
 533                 // allocate dma buffer
 534                 devpriv->dma_buffer =
 535                         kmalloc(dma_buffer_size, GFP_KERNEL | GFP_DMA);
 536                 if (devpriv->dma_buffer == NULL) {
 537                         printk(" failed to allocate dma buffer\n");
 538                         return -ENOMEM;
 539                 }
 540                 if (request_dma(dma_chan, driver_labpc.driver_name)) {
 541                         printk(" failed to allocate dma channel %u\n",
 542                                 dma_chan);
 543                         return -EINVAL;
 544                 }
 545                 devpriv->dma_chan = dma_chan;
 546                 dma_flags = claim_dma_lock();
 547                 disable_dma(devpriv->dma_chan);
 548                 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
 549                 release_dma_lock(dma_flags);
 550         }
 551
 552         dev->board_name = thisboard->name;
 553
 554         if (alloc_subdevices(dev, 5) < 0)
 555                 return -ENOMEM;
 556
 557         /* analog input subdevice */
 558         s = dev->subdevices + 0;
 559         dev->read_subdev = s;
 560         s->type = COMEDI_SUBD_AI;
 561         s->subdev_flags =
 562                 SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF |
 563                 SDF_CMD_READ;
 564         s->n_chan = 8;
 565         s->len_chanlist = 8;
 566         s->maxdata = (1 << 12) - 1;     // 12 bit resolution
 567         s->range_table = thisboard->ai_range_table;
 568         s->do_cmd = labpc_ai_cmd;
 569         s->do_cmdtest = labpc_ai_cmdtest;
 570         s->insn_read = labpc_ai_rinsn;
 571         s->cancel = labpc_cancel;
 572
 573         /* analog output */
 574         s = dev->subdevices + 1;
 575         if (thisboard->has_ao) {
 576 /* Could provide command support, except it only has a one sample
 577  * hardware buffer for analog output and no underrun flag. */
 578                 s->type = COMEDI_SUBD_AO;
 579                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
 580                 s->n_chan = NUM_AO_CHAN;
 581                 s->maxdata = (1 << 12) - 1;     // 12 bit resolution
 582                 s->range_table = &range_labpc_ao;
 583                 s->insn_read = labpc_ao_rinsn;
 584                 s->insn_write = labpc_ao_winsn;
 585                 /* initialize analog outputs to a known value */
 586                 for (i = 0; i < s->n_chan; i++) {
 587                         devpriv->ao_value[i] = s->maxdata / 2;
 588                         lsb = devpriv->ao_value[i] & 0xff;
 589                         msb = (devpriv->ao_value[i] >> 8) & 0xff;
 590                         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
 591                         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
 592                 }
 593         } else {
 594                 s->type = COMEDI_SUBD_UNUSED;
 595         }
 596
 597         /* 8255 dio */
 598         s = dev->subdevices + 2;
 599         // if board uses io memory we have to give a custom callback function to the 8255 driver
 600         if (thisboard->memory_mapped_io)
 601                 subdev_8255_init(dev, s, labpc_dio_mem_callback,
 602                         (unsigned long)(dev->iobase + DIO_BASE_REG));
 603         else
 604                 subdev_8255_init(dev, s, NULL, dev->iobase + DIO_BASE_REG);
 605
 606         // calibration subdevices for boards that have one
 607         s = dev->subdevices + 3;
 608         if (thisboard->register_layout == labpc_1200_layout) {
 609                 s->type = COMEDI_SUBD_CALIB;
 610                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 611                 s->n_chan = 16;
 612                 s->maxdata = 0xff;
 613                 s->insn_read = labpc_calib_read_insn;
 614                 s->insn_write = labpc_calib_write_insn;
 615
 616                 for (i = 0; i < s->n_chan; i++)
 617                         write_caldac(dev, i, s->maxdata / 2);
 618         } else
 619                 s->type = COMEDI_SUBD_UNUSED;
 620
 621         /* EEPROM */
 622         s = dev->subdevices + 4;
 623         if (thisboard->register_layout == labpc_1200_layout) {
 624                 s->type = COMEDI_SUBD_MEMORY;
 625                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
 626                 s->n_chan = EEPROM_SIZE;
 627                 s->maxdata = 0xff;
 628                 s->insn_read = labpc_eeprom_read_insn;
 629                 s->insn_write = labpc_eeprom_write_insn;
 630
 631                 for (i = 0; i < EEPROM_SIZE; i++) {
 632                         devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
 633                 }
 634 #ifdef LABPC_DEBUG
 635                 printk(" eeprom:");
 636                 for (i = 0; i < EEPROM_SIZE; i++) {
 637                         printk(" %i:0x%x ", i, devpriv->eeprom_data[i]);
 638                 }
 639                 printk("\n");
 640 #endif
 641         } else
 642                 s->type = COMEDI_SUBD_UNUSED;
 643
 644         return 0;
 645 }
 646
 647 static int labpc_attach(comedi_device * dev, comedi_devconfig * it)
 648 {
 649         unsigned long iobase = 0;
 650         unsigned int irq = 0;
 651         unsigned int dma_chan = 0;
 652 #ifdef CONFIG_COMEDI_PCI
 653         int retval;
 654 #endif
 655
 656         /* allocate and initialize dev->private */
 657         if (alloc_private(dev, sizeof(labpc_private)) < 0)
 658                 return -ENOMEM;
 659
 660         // get base address, irq etc. based on bustype
 661         switch (thisboard->bustype) {
 662         case isa_bustype:
 663                 iobase = it->options[0];
 664                 irq = it->options[1];
 665                 dma_chan = it->options[2];
 666                 break;
 667         case pci_bustype:
 668 #ifdef CONFIG_COMEDI_PCI
 669                 retval = labpc_find_device(dev, it->options[0], it->options[1]);
 670                 if (retval < 0) {
 671                         return retval;
 672                 }
 673                 retval = mite_setup(devpriv->mite);
 674                 if (retval < 0)
 675                         return retval;
 676                 iobase = (unsigned long)devpriv->mite->daq_io_addr;
 677                 irq = mite_irq(devpriv->mite);
 678 #else
 679                 printk(" this driver has not been built with PCI support.\n");
 680                 return -EINVAL;
 681 #endif
 682                 break;
 683         case pcmcia_bustype:
 684                 printk(" this driver does not support pcmcia cards, use ni_labpc_cs.o\n");
 685                 return -EINVAL;
 686                 break;
 687         default:
 688                 printk("bug! couldn't determine board type\n");
 689                 return -EINVAL;
 690                 break;
 691         }
 692
 693         return labpc_common_attach(dev, iobase, irq, dma_chan);
 694 }
 695
 696 // adapted from ni_pcimio for finding mite based boards (pc-1200)
 697 #ifdef CONFIG_COMEDI_PCI
 698 static int labpc_find_device(comedi_device *dev, int bus, int slot)
 699 {
 700         struct mite_struct *mite;
 701         int i;
 702         for (mite = mite_devices; mite; mite = mite->next) {
 703                 if (mite->used)
 704                         continue;
 705                 // if bus/slot are specified then make sure we have the right bus/slot
 706                 if (bus || slot) {
 707                         if (bus != mite->pcidev->bus->number
 708                                 || slot != PCI_SLOT(mite->pcidev->devfn))
 709                                 continue;
 710                 }
 711                 for (i = 0; i < driver_labpc.num_names; i++) {
 712                         if (labpc_boards[i].bustype != pci_bustype)
 713                                 continue;
 714                         if (mite_device_id(mite) == labpc_boards[i].device_id) {
 715                                 devpriv->mite = mite;
 716                                 // fixup board pointer, in case we were using the dummy "ni_labpc" entry
 717                                 dev->board_ptr = &labpc_boards[i];
 718                                 return 0;
 719                         }
 720                 }
 721         }
 722         printk("no device found\n");
 723         mite_list_devices();
 724         return -EIO;
 725 }
 726 #endif
 727
 728 int labpc_common_detach(comedi_device * dev)
 729 {
 730         printk("comedi%d: ni_labpc: detach\n", dev->minor);
 731
 732         if (dev->subdevices)
 733                 subdev_8255_cleanup(dev, dev->subdevices + 2);
 734
 735         /* only free stuff if it has been allocated by _attach */
 736         if (devpriv->dma_buffer)
 737                 kfree(devpriv->dma_buffer);
 738         if (devpriv->dma_chan)
 739                 free_dma(devpriv->dma_chan);
 740         if (dev->irq)
 741                 comedi_free_irq(dev->irq, dev);
 742         if (thisboard->bustype == isa_bustype && dev->iobase)
 743                 release_region(dev->iobase, LABPC_SIZE);
 744 #ifdef CONFIG_COMEDI_PCI
 745         if (devpriv->mite)
 746                 mite_unsetup(devpriv->mite);
 747 #endif
 748
 749         return 0;
 750 };
 751
 752 static void labpc_clear_adc_fifo(const comedi_device * dev)
 753 {
 754         devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
 755         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 756         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 757 }
 758
 759 static int labpc_cancel(comedi_device * dev, comedi_subdevice * s)
 760 {
 761         unsigned long flags;
 762
 763         comedi_spin_lock_irqsave(&dev->spinlock, flags);
 764         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
 765         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 766         comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
 767
 768         devpriv->command3_bits = 0;
 769         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 770
 771         return 0;
 772 }
 773
 774 static enum scan_mode labpc_ai_scan_mode(const comedi_cmd * cmd)
 775 {
 776         if (cmd->chanlist_len == 1)
 777                 return MODE_SINGLE_CHAN;
 778
 779         /* chanlist may be NULL during cmdtest. */
 780         if (cmd->chanlist == NULL)
 781                 return MODE_MULT_CHAN_UP;
 782
 783         if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
 784                 return MODE_SINGLE_CHAN_INTERVAL;
 785
 786         if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
 787                 return MODE_MULT_CHAN_UP;
 788
 789         if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
 790                 return MODE_MULT_CHAN_DOWN;
 791
 792         rt_printk("ni_labpc: bug! this should never happen\n");
 793
 794         return 0;
 795 }
 796
 797 static int labpc_ai_chanlist_invalid(const comedi_device * dev,
 798         const comedi_cmd * cmd)
 799 {
 800         int mode, channel, range, aref, i;
 801
 802         if (cmd->chanlist == NULL)
 803                 return 0;
 804
 805         mode = labpc_ai_scan_mode(cmd);
 806
 807         if (mode == MODE_SINGLE_CHAN)
 808                 return 0;
 809
 810         if (mode == MODE_SINGLE_CHAN_INTERVAL) {
 811                 if (cmd->chanlist_len > 0xff) {
 812                         comedi_error(dev,
 813                                 "ni_labpc: chanlist too long for single channel interval mode\n");
 814                         return 1;
 815                 }
 816         }
 817
 818         channel = CR_CHAN(cmd->chanlist[0]);
 819         range = CR_RANGE(cmd->chanlist[0]);
 820         aref = CR_AREF(cmd->chanlist[0]);
 821
 822         for (i = 0; i < cmd->chanlist_len; i++) {
 823
 824                 switch (mode) {
 825                 case MODE_SINGLE_CHAN_INTERVAL:
 826                         if (CR_CHAN(cmd->chanlist[i]) != channel) {
 827                                 comedi_error(dev,
 828                                         "channel scanning order specified in chanlist is not supported by hardware.\n");
 829                                 return 1;
 830                         }
 831                         break;
 832                 case MODE_MULT_CHAN_UP:
 833                         if (CR_CHAN(cmd->chanlist[i]) != i) {
 834                                 comedi_error(dev,
 835                                         "channel scanning order specified in chanlist is not supported by hardware.\n");
 836                                 return 1;
 837                         }
 838                         break;
 839                 case MODE_MULT_CHAN_DOWN:
 840                         if (CR_CHAN(cmd->chanlist[i]) !=
 841                                 cmd->chanlist_len - i - 1) {
 842                                 comedi_error(dev,
 843                                         "channel scanning order specified in chanlist is not supported by hardware.\n");
 844                                 return 1;
 845                         }
 846                         break;
 847                 default:
 848                         rt_printk("ni_labpc: bug! in chanlist check\n");
 849                         return 1;
 850                         break;
 851                 }
 852
 853                 if (CR_RANGE(cmd->chanlist[i]) != range) {
 854                         comedi_error(dev,
 855                                 "entries in chanlist must all have the same range\n");
 856                         return 1;
 857                 }
 858
 859                 if (CR_AREF(cmd->chanlist[i]) != aref) {
 860                         comedi_error(dev,
 861                                 "entries in chanlist must all have the same reference\n");
 862                         return 1;
 863                 }
 864         }
 865
 866         return 0;
 867 }
 868
 869 static int labpc_use_continuous_mode(const comedi_cmd * cmd)
 870 {
 871         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN)
 872                 return 1;
 873
 874         if (cmd->scan_begin_src == TRIG_FOLLOW)
 875                 return 1;
 876
 877         return 0;
 878 }
 879
 880 static unsigned int labpc_ai_convert_period(const comedi_cmd * cmd)
 881 {
 882         if (cmd->convert_src != TRIG_TIMER)
 883                 return 0;
 884
 885         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 886                 cmd->scan_begin_src == TRIG_TIMER)
 887                 return cmd->scan_begin_arg;
 888
 889         return cmd->convert_arg;
 890 }
 891
 892 static void labpc_set_ai_convert_period(comedi_cmd * cmd, unsigned int ns)
 893 {
 894         if (cmd->convert_src != TRIG_TIMER)
 895                 return;
 896
 897         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 898                 cmd->scan_begin_src == TRIG_TIMER) {
 899                 cmd->scan_begin_arg = ns;
 900                 if (cmd->convert_arg > cmd->scan_begin_arg)
 901                         cmd->convert_arg = cmd->scan_begin_arg;
 902         } else
 903                 cmd->convert_arg = ns;
 904 }
 905
 906 static unsigned int labpc_ai_scan_period(const comedi_cmd * cmd)
 907 {
 908         if (cmd->scan_begin_src != TRIG_TIMER)
 909                 return 0;
 910
 911         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 912                 cmd->convert_src == TRIG_TIMER)
 913                 return 0;
 914
 915         return cmd->scan_begin_arg;
 916 }
 917
 918 static void labpc_set_ai_scan_period(comedi_cmd * cmd, unsigned int ns)
 919 {
 920         if (cmd->scan_begin_src != TRIG_TIMER)
 921                 return;
 922
 923         if (labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN &&
 924                 cmd->convert_src == TRIG_TIMER)
 925                 return;
 926
 927         cmd->scan_begin_arg = ns;
 928 }
 929
 930 static int labpc_ai_cmdtest(comedi_device * dev, comedi_subdevice * s,
 931         comedi_cmd * cmd)
 932 {
 933         int err = 0;
 934         int tmp, tmp2;
 935         int stop_mask;
 936
 937         /* step 1: make sure trigger sources are trivially valid */
 938
 939         tmp = cmd->start_src;
 940         cmd->start_src &= TRIG_NOW | TRIG_EXT;
 941         if (!cmd->start_src || tmp != cmd->start_src)
 942                 err++;
 943
 944         tmp = cmd->scan_begin_src;
 945         cmd->scan_begin_src &= TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT;
 946         if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
 947                 err++;
 948
 949         tmp = cmd->convert_src;
 950         cmd->convert_src &= TRIG_TIMER | TRIG_EXT;
 951         if (!cmd->convert_src || tmp != cmd->convert_src)
 952                 err++;
 953
 954         tmp = cmd->scan_end_src;
 955         cmd->scan_end_src &= TRIG_COUNT;
 956         if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
 957                 err++;
 958
 959         tmp = cmd->stop_src;
 960         stop_mask = TRIG_COUNT | TRIG_NONE;
 961         if (thisboard->register_layout == labpc_1200_layout)
 962                 stop_mask |= TRIG_EXT;
 963         cmd->stop_src &= stop_mask;
 964         if (!cmd->stop_src || tmp != cmd->stop_src)
 965                 err++;
 966
 967         if (err)
 968                 return 1;
 969
 970         /* step 2: make sure trigger sources are unique and mutually compatible */
 971
 972         if (cmd->start_src != TRIG_NOW && cmd->start_src != TRIG_EXT)
 973                 err++;
 974         if (cmd->scan_begin_src != TRIG_TIMER &&
 975                 cmd->scan_begin_src != TRIG_FOLLOW &&
 976                 cmd->scan_begin_src != TRIG_EXT)
 977                 err++;
 978         if (cmd->convert_src != TRIG_TIMER && cmd->convert_src != TRIG_EXT)
 979                 err++;
 980         if (cmd->stop_src != TRIG_COUNT &&
 981                 cmd->stop_src != TRIG_EXT && cmd->stop_src != TRIG_NONE)
 982                 err++;
 983
 984         // can't have external stop and start triggers at once
 985         if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
 986                 err++;
 987
 988         if (err)
 989                 return 2;
 990
 991         /* step 3: make sure arguments are trivially compatible */
 992
 993         if (cmd->start_arg == TRIG_NOW && cmd->start_arg != 0) {
 994                 cmd->start_arg = 0;
 995                 err++;
 996         }
 997
 998         if (!cmd->chanlist_len) {
 999                 err++;
1000         }
1001         if (cmd->scan_end_arg != cmd->chanlist_len) {
1002                 cmd->scan_end_arg = cmd->chanlist_len;
1003                 err++;
1004         }
1005
1006         if (cmd->convert_src == TRIG_TIMER) {
1007                 if (cmd->convert_arg < thisboard->ai_speed) {
1008                         cmd->convert_arg = thisboard->ai_speed;
1009                         err++;
1010                 }
1011         }
1012         // make sure scan timing is not too fast
1013         if (cmd->scan_begin_src == TRIG_TIMER) {
1014                 if (cmd->convert_src == TRIG_TIMER &&
1015                         cmd->scan_begin_arg <
1016                         cmd->convert_arg * cmd->chanlist_len) {
1017                         cmd->scan_begin_arg =
1018                                 cmd->convert_arg * cmd->chanlist_len;
1019                         err++;
1020                 }
1021                 if (cmd->scan_begin_arg <
1022                         thisboard->ai_speed * cmd->chanlist_len) {
1023                         cmd->scan_begin_arg =
1024                                 thisboard->ai_speed * cmd->chanlist_len;
1025                         err++;
1026                 }
1027         }
1028         // stop source
1029         switch (cmd->stop_src) {
1030         case TRIG_COUNT:
1031                 if (!cmd->stop_arg) {
1032                         cmd->stop_arg = 1;
1033                         err++;
1034                 }
1035                 break;
1036         case TRIG_NONE:
1037                 if (cmd->stop_arg != 0) {
1038                         cmd->stop_arg = 0;
1039                         err++;
1040                 }
1041                 break;
1042                 // TRIG_EXT doesn't care since it doesn't trigger off a numbered channel
1043         default:
1044                 break;
1045         }
1046
1047         if (err)
1048                 return 3;
1049
1050         /* step 4: fix up any arguments */
1051
1052         tmp = cmd->convert_arg;
1053         tmp2 = cmd->scan_begin_arg;
1054         labpc_adc_timing(dev, cmd);
1055         if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
1056                 err++;
1057
1058         if (err)
1059                 return 4;
1060
1061         if (labpc_ai_chanlist_invalid(dev, cmd))
1062                 return 5;
1063
1064         return 0;
1065 }
1066
1067 static int labpc_ai_cmd(comedi_device * dev, comedi_subdevice * s)
1068 {
1069         int channel, range, aref;
1070         unsigned long irq_flags;
1071         int ret;
1072         comedi_async *async = s->async;
1073         comedi_cmd *cmd = &async->cmd;
1074         enum transfer_type xfer;
1075         unsigned long flags;
1076
1077         if (!dev->irq) {
1078                 comedi_error(dev, "no irq assigned, cannot perform command");
1079                 return -1;
1080         }
1081
1082         range = CR_RANGE(cmd->chanlist[0]);
1083         aref = CR_AREF(cmd->chanlist[0]);
1084
1085         // make sure board is disabled before setting up aquisition
1086         comedi_spin_lock_irqsave(&dev->spinlock, flags);
1087         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1088         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1089         comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1090
1091         devpriv->command3_bits = 0;
1092         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1093
1094         // initialize software conversion count
1095         if (cmd->stop_src == TRIG_COUNT) {
1096                 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
1097         }
1098         // setup hardware conversion counter
1099         if (cmd->stop_src == TRIG_EXT) {
1100                 // load counter a1 with count of 3 (pc+ manual says this is minimum allowed) using mode 0
1101                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1102                         1, 3, 0);
1103                 if (ret < 0) {
1104                         comedi_error(dev, "error loading counter a1");
1105                         return -1;
1106                 }
1107         } else                  // otherwise, just put a1 in mode 0 with no count to set its output low
1108                 devpriv->write_byte(INIT_A1_BITS,
1109                         dev->iobase + COUNTER_A_CONTROL_REG);
1110
1111         // figure out what method we will use to transfer data
1112         if (devpriv->dma_chan &&        // need a dma channel allocated
1113                 // dma unsafe at RT priority, and too much setup time for TRIG_WAKE_EOS for
1114                 (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0 &&
1115                 // only available on the isa boards
1116                 thisboard->bustype == isa_bustype) {
1117                 xfer = isa_dma_transfer;
1118         } else if (thisboard->register_layout == labpc_1200_layout &&   // pc-plus has no fifo-half full interrupt
1119                 // wake-end-of-scan should interrupt on fifo not empty
1120                 (cmd->flags & TRIG_WAKE_EOS) == 0 &&
1121                 // make sure we are taking more than just a few points
1122                 (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
1123                 xfer = fifo_half_full_transfer;
1124         } else
1125                 xfer = fifo_not_empty_transfer;
1126         devpriv->current_transfer = xfer;
1127
1128         // setup command6 register for 1200 boards
1129         if (thisboard->register_layout == labpc_1200_layout) {
1130                 // reference inputs to ground or common?
1131                 if (aref != AREF_GROUND)
1132                         devpriv->command6_bits |= ADC_COMMON_BIT;
1133                 else
1134                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1135                 // bipolar or unipolar range?
1136                 if (thisboard->ai_range_is_unipolar[range])
1137                         devpriv->command6_bits |= ADC_UNIP_BIT;
1138                 else
1139                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1140                 // interrupt on fifo half full?
1141                 if (xfer == fifo_half_full_transfer)
1142                         devpriv->command6_bits |= ADC_FHF_INTR_EN_BIT;
1143                 else
1144                         devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1145                 // enable interrupt on counter a1 terminal count?
1146                 if (cmd->stop_src == TRIG_EXT)
1147                         devpriv->command6_bits |= A1_INTR_EN_BIT;
1148                 else
1149                         devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1150                 // are we scanning up or down through channels?
1151                 if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1152                         devpriv->command6_bits |= ADC_SCAN_UP_BIT;
1153                 else
1154                         devpriv->command6_bits &= ~ADC_SCAN_UP_BIT;
1155                 // write to register
1156                 devpriv->write_byte(devpriv->command6_bits,
1157                         dev->iobase + COMMAND6_REG);
1158         }
1159
1160         /* setup channel list, etc (command1 register) */
1161         devpriv->command1_bits = 0;
1162         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP)
1163                 channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
1164         else
1165                 channel = CR_CHAN(cmd->chanlist[0]);
1166         // munge channel bits for differential / scan disabled mode
1167         if ((labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN ||
1168              labpc_ai_scan_mode(cmd) == MODE_SINGLE_CHAN_INTERVAL) &&
1169             aref == AREF_DIFF)
1170                 channel *= 2;
1171         devpriv->command1_bits |= ADC_CHAN_BITS(channel);
1172         devpriv->command1_bits |= thisboard->ai_range_code[range];
1173         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1174         // manual says to set scan enable bit on second pass
1175         if (labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_UP ||
1176                 labpc_ai_scan_mode(cmd) == MODE_MULT_CHAN_DOWN) {
1177                 devpriv->command1_bits |= ADC_SCAN_EN_BIT;
1178                 /* need a brief delay before enabling scan, or scan list will get screwed when you switch
1179                  * between scan up to scan down mode - dunno why */
1180                 comedi_udelay(1);
1181                 devpriv->write_byte(devpriv->command1_bits,
1182                         dev->iobase + COMMAND1_REG);
1183         }
1184
1185         devpriv->write_byte(cmd->chanlist_len,
1186                 dev->iobase + INTERVAL_COUNT_REG);
1187         // load count
1188         devpriv->write_byte(INTERVAL_LOAD_BITS,
1189                 dev->iobase + INTERVAL_LOAD_REG);
1190
1191         if (cmd->convert_src == TRIG_TIMER || cmd->scan_begin_src == TRIG_TIMER) {
1192                 // set up pacing
1193                 labpc_adc_timing(dev, cmd);
1194                 // load counter b0 in mode 3
1195                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1196                         0, devpriv->divisor_b0, 3);
1197                 if (ret < 0) {
1198                         comedi_error(dev, "error loading counter b0");
1199                         return -1;
1200                 }
1201         }
1202         // set up conversion pacing
1203         if (labpc_ai_convert_period(cmd)) {
1204                 // load counter a0 in mode 2
1205                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1206                         0, devpriv->divisor_a0, 2);
1207                 if (ret < 0) {
1208                         comedi_error(dev, "error loading counter a0");
1209                         return -1;
1210                 }
1211         } else
1212                 devpriv->write_byte(INIT_A0_BITS,
1213                         dev->iobase + COUNTER_A_CONTROL_REG);
1214
1215         // set up scan pacing
1216         if (labpc_ai_scan_period(cmd)) {
1217                 // load counter b1 in mode 2
1218                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1219                         1, devpriv->divisor_b1, 2);
1220                 if (ret < 0) {
1221                         comedi_error(dev, "error loading counter b1");
1222                         return -1;
1223                 }
1224         }
1225
1226         labpc_clear_adc_fifo(dev);
1227
1228         // set up dma transfer
1229         if (xfer == isa_dma_transfer) {
1230                 irq_flags = claim_dma_lock();
1231                 disable_dma(devpriv->dma_chan);
1232                 /* clear flip-flop to make sure 2-byte registers for
1233                  * count and address get set correctly */
1234                 clear_dma_ff(devpriv->dma_chan);
1235                 set_dma_addr(devpriv->dma_chan,
1236                         virt_to_bus(devpriv->dma_buffer));
1237                 // set appropriate size of transfer
1238                 devpriv->dma_transfer_size = labpc_suggest_transfer_size(*cmd);
1239                 if (cmd->stop_src == TRIG_COUNT &&
1240                         devpriv->count * sample_size <
1241                         devpriv->dma_transfer_size) {
1242                         devpriv->dma_transfer_size =
1243                                 devpriv->count * sample_size;
1244                 }
1245                 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
1246                 enable_dma(devpriv->dma_chan);
1247                 release_dma_lock(irq_flags);
1248                 // enable board's dma
1249                 devpriv->command3_bits |= DMA_EN_BIT | DMATC_INTR_EN_BIT;
1250         } else
1251                 devpriv->command3_bits &= ~DMA_EN_BIT & ~DMATC_INTR_EN_BIT;
1252
1253         // enable error interrupts
1254         devpriv->command3_bits |= ERR_INTR_EN_BIT;
1255         // enable fifo not empty interrupt?
1256         if (xfer == fifo_not_empty_transfer)
1257                 devpriv->command3_bits |= ADC_FNE_INTR_EN_BIT;
1258         else
1259                 devpriv->command3_bits &= ~ADC_FNE_INTR_EN_BIT;
1260         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1261
1262         // setup any external triggering/pacing (command4 register)
1263         devpriv->command4_bits = 0;
1264         if (cmd->convert_src != TRIG_EXT)
1265                 devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1266         /* XXX should discard first scan when using interval scanning
1267          * since manual says it is not synced with scan clock */
1268         if (labpc_use_continuous_mode(cmd) == 0) {
1269                 devpriv->command4_bits |= INTERVAL_SCAN_EN_BIT;
1270                 if (cmd->scan_begin_src == TRIG_EXT)
1271                         devpriv->command4_bits |= EXT_SCAN_EN_BIT;
1272         }
1273         // single-ended/differential
1274         if (aref == AREF_DIFF)
1275                 devpriv->command4_bits |= ADC_DIFF_BIT;
1276         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1277
1278         // startup aquisition
1279
1280         // command2 reg
1281         // use 2 cascaded counters for pacing
1282         comedi_spin_lock_irqsave(&dev->spinlock, flags);
1283         devpriv->command2_bits |= CASCADE_BIT;
1284         switch (cmd->start_src) {
1285         case TRIG_EXT:
1286                 devpriv->command2_bits |= HWTRIG_BIT;
1287                 devpriv->command2_bits &= ~PRETRIG_BIT & ~SWTRIG_BIT;
1288                 break;
1289         case TRIG_NOW:
1290                 devpriv->command2_bits |= SWTRIG_BIT;
1291                 devpriv->command2_bits &= ~PRETRIG_BIT & ~HWTRIG_BIT;
1292                 break;
1293         default:
1294                 comedi_error(dev, "bug with start_src");
1295                 comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1296                 return -1;
1297                 break;
1298         }
1299         switch (cmd->stop_src) {
1300         case TRIG_EXT:
1301                 devpriv->command2_bits |= HWTRIG_BIT | PRETRIG_BIT;
1302                 break;
1303         case TRIG_COUNT:
1304         case TRIG_NONE:
1305                 break;
1306         default:
1307                 comedi_error(dev, "bug with stop_src");
1308                 comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1309                 return -1;
1310         }
1311         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1312         comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1313
1314         return 0;
1315 }
1316
1317 /* interrupt service routine */
1318 static irqreturn_t labpc_interrupt(int irq, void *d PT_REGS_ARG)
1319 {
1320         comedi_device *dev = d;
1321         comedi_subdevice *s = dev->read_subdev;
1322         comedi_async *async;
1323         comedi_cmd *cmd;
1324
1325         if (dev->attached == 0) {
1326                 comedi_error(dev, "premature interrupt");
1327                 return IRQ_HANDLED;
1328         }
1329
1330         async = s->async;
1331         cmd = &async->cmd;
1332         async->events = 0;
1333
1334         // read board status
1335         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1336         if (thisboard->register_layout == labpc_1200_layout)
1337                 devpriv->status2_bits =
1338                         devpriv->read_byte(dev->iobase + STATUS2_REG);
1339
1340         if ((devpriv->status1_bits & (DMATC_BIT | TIMER_BIT | OVERFLOW_BIT |
1341                                 OVERRUN_BIT | DATA_AVAIL_BIT)) == 0
1342                 && (devpriv->status2_bits & A1_TC_BIT) == 0
1343                 && (devpriv->status2_bits & FNHF_BIT)) {
1344                 return IRQ_NONE;
1345         }
1346
1347         if (devpriv->status1_bits & OVERRUN_BIT) {
1348                 // clear error interrupt
1349                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1350                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1351                 comedi_event(dev, s);
1352                 comedi_error(dev, "overrun");
1353                 return IRQ_HANDLED;
1354         }
1355
1356         if (devpriv->current_transfer == isa_dma_transfer) {
1357                 // if a dma terminal count of external stop trigger has occurred
1358                 if (devpriv->status1_bits & DMATC_BIT ||
1359                         (thisboard->register_layout == labpc_1200_layout
1360                                 && devpriv->status2_bits & A1_TC_BIT)) {
1361                         handle_isa_dma(dev);
1362                 }
1363         } else
1364                 labpc_drain_fifo(dev);
1365
1366         if (devpriv->status1_bits & TIMER_BIT) {
1367                 comedi_error(dev, "handled timer interrupt?");
1368                 // clear it
1369                 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1370         }
1371
1372         if (devpriv->status1_bits & OVERFLOW_BIT) {
1373                 // clear error interrupt
1374                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1375                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1376                 comedi_event(dev, s);
1377                 comedi_error(dev, "overflow");
1378                 return IRQ_HANDLED;
1379         }
1380         // handle external stop trigger
1381         if (cmd->stop_src == TRIG_EXT) {
1382                 if (devpriv->status2_bits & A1_TC_BIT) {
1383                         labpc_drain_dregs(dev);
1384                         labpc_cancel(dev, s);
1385                         async->events |= COMEDI_CB_EOA;
1386                 }
1387         }
1388
1389         /* TRIG_COUNT end of acquisition */
1390         if (cmd->stop_src == TRIG_COUNT) {
1391                 if (devpriv->count == 0) {
1392                         labpc_cancel(dev, s);
1393                         async->events |= COMEDI_CB_EOA;
1394                 }
1395         }
1396
1397         comedi_event(dev, s);
1398         return IRQ_HANDLED;
1399 }
1400
1401 // read all available samples from ai fifo
1402 static int labpc_drain_fifo(comedi_device * dev)
1403 {
1404         unsigned int lsb, msb;
1405         sampl_t data;
1406         comedi_async *async = dev->read_subdev->async;
1407         const int timeout = 10000;
1408         unsigned int i;
1409
1410         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1411
1412         for (i = 0; (devpriv->status1_bits & DATA_AVAIL_BIT) && i < timeout;
1413                 i++) {
1414                 // quit if we have all the data we want
1415                 if (async->cmd.stop_src == TRIG_COUNT) {
1416                         if (devpriv->count == 0)
1417                                 break;
1418                         devpriv->count--;
1419                 }
1420                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1421                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1422                 data = (msb << 8) | lsb;
1423                 cfc_write_to_buffer(dev->read_subdev, data);
1424                 devpriv->status1_bits =
1425                         devpriv->read_byte(dev->iobase + STATUS1_REG);
1426         }
1427         if (i == timeout) {
1428                 comedi_error(dev, "ai timeout, fifo never empties");
1429                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1430                 return -1;
1431         }
1432
1433         return 0;
1434 }
1435
1436 static void labpc_drain_dma(comedi_device * dev)
1437 {
1438         comedi_subdevice *s = dev->read_subdev;
1439         comedi_async *async = s->async;
1440         int status;
1441         unsigned long flags;
1442         unsigned int max_points, num_points, residue, leftover;
1443         int i;
1444
1445         status = devpriv->status1_bits;
1446
1447         flags = claim_dma_lock();
1448         disable_dma(devpriv->dma_chan);
1449         /* clear flip-flop to make sure 2-byte registers for
1450          * count and address get set correctly */
1451         clear_dma_ff(devpriv->dma_chan);
1452
1453         // figure out how many points to read
1454         max_points = devpriv->dma_transfer_size / sample_size;
1455         /* residue is the number of points left to be done on the dma
1456          * transfer.  It should always be zero at this point unless
1457          * the stop_src is set to external triggering.
1458          */
1459         residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1460         num_points = max_points - residue;
1461         if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1462                 num_points = devpriv->count;
1463
1464         // figure out how many points will be stored next time
1465         leftover = 0;
1466         if (async->cmd.stop_src != TRIG_COUNT) {
1467                 leftover = devpriv->dma_transfer_size / sample_size;
1468         } else if (devpriv->count > num_points) {
1469                 leftover = devpriv->count - num_points;
1470                 if (leftover > max_points)
1471                         leftover = max_points;
1472         }
1473
1474         /* write data to comedi buffer */
1475         for (i = 0; i < num_points; i++) {
1476                 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1477         }
1478         if (async->cmd.stop_src == TRIG_COUNT)
1479                 devpriv->count -= num_points;
1480
1481         // set address and count for next transfer
1482         set_dma_addr(devpriv->dma_chan, virt_to_bus(devpriv->dma_buffer));
1483         set_dma_count(devpriv->dma_chan, leftover * sample_size);
1484         release_dma_lock(flags);
1485
1486         async->events |= COMEDI_CB_BLOCK;
1487 }
1488
1489 static void handle_isa_dma(comedi_device * dev)
1490 {
1491         labpc_drain_dma(dev);
1492
1493         enable_dma(devpriv->dma_chan);
1494
1495         // clear dma tc interrupt
1496         devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1497 }
1498
1499 /* makes sure all data aquired by board is transfered to comedi (used
1500  * when aquisition is terminated by stop_src == TRIG_EXT). */
1501 static void labpc_drain_dregs(comedi_device * dev)
1502 {
1503         if (devpriv->current_transfer == isa_dma_transfer)
1504                 labpc_drain_dma(dev);
1505
1506         labpc_drain_fifo(dev);
1507 }
1508
1509 static int labpc_ai_rinsn(comedi_device * dev, comedi_subdevice * s,
1510         comedi_insn * insn, lsampl_t * data)
1511 {
1512         int i, n;
1513         int chan, range;
1514         int lsb, msb;
1515         int timeout = 1000;
1516         unsigned long flags;
1517
1518         // disable timed conversions
1519         comedi_spin_lock_irqsave(&dev->spinlock, flags);
1520         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1521         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1522         comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1523
1524         // disable interrupt generation and dma
1525         devpriv->command3_bits = 0;
1526         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1527
1528         /* set gain and channel */
1529         devpriv->command1_bits = 0;
1530         chan = CR_CHAN(insn->chanspec);
1531         range = CR_RANGE(insn->chanspec);
1532         devpriv->command1_bits |= thisboard->ai_range_code[range];
1533         // munge channel bits for differential/scan disabled mode
1534         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1535                 chan *= 2;
1536         devpriv->command1_bits |= ADC_CHAN_BITS(chan);
1537         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1538
1539         // setup command6 register for 1200 boards
1540         if (thisboard->register_layout == labpc_1200_layout) {
1541                 // reference inputs to ground or common?
1542                 if (CR_AREF(insn->chanspec) != AREF_GROUND)
1543                         devpriv->command6_bits |= ADC_COMMON_BIT;
1544                 else
1545                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1546                 // bipolar or unipolar range?
1547                 if (thisboard->ai_range_is_unipolar[range])
1548                         devpriv->command6_bits |= ADC_UNIP_BIT;
1549                 else
1550                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1551                 // don't interrupt on fifo half full
1552                 devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1553                 // don't enable interrupt on counter a1 terminal count?
1554                 devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1555                 // write to register
1556                 devpriv->write_byte(devpriv->command6_bits,
1557                         dev->iobase + COMMAND6_REG);
1558         }
1559         // setup command4 register
1560         devpriv->command4_bits = 0;
1561         devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1562         // single-ended/differential
1563         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1564                 devpriv->command4_bits |= ADC_DIFF_BIT;
1565         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1566
1567         // initialize pacer counter output to make sure it doesn't cause any problems
1568         devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
1569
1570         labpc_clear_adc_fifo(dev);
1571
1572         for (n = 0; n < insn->n; n++) {
1573                 /* trigger conversion */
1574                 devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
1575
1576                 for (i = 0; i < timeout; i++) {
1577                         if (devpriv->read_byte(dev->iobase +
1578                                         STATUS1_REG) & DATA_AVAIL_BIT)
1579                                 break;
1580                         comedi_udelay(1);
1581                 }
1582                 if (i == timeout) {
1583                         comedi_error(dev, "timeout");
1584                         return -ETIME;
1585                 }
1586                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1587                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1588                 data[n] = (msb << 8) | lsb;
1589         }
1590
1591         return n;
1592 }
1593
1594 // analog output insn
1595 static int labpc_ao_winsn(comedi_device * dev, comedi_subdevice * s,
1596         comedi_insn * insn, lsampl_t * data)
1597 {
1598         int channel, range;
1599         unsigned long flags;
1600         int lsb, msb;
1601
1602         if (insn->n == 0)
1603                 return 0;
1604
1605         channel = CR_CHAN(insn->chanspec);
1606
1607         // turn off pacing of analog output channel
1608         /* note: hardware bug in daqcard-1200 means pacing cannot
1609          * be independently enabled/disabled for its the two channels */
1610         comedi_spin_lock_irqsave(&dev->spinlock, flags);
1611         devpriv->command2_bits &= ~DAC_PACED_BIT(channel);
1612         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1613         comedi_spin_unlock_irqrestore(&dev->spinlock, flags);
1614
1615         // set range
1616         if (thisboard->register_layout == labpc_1200_layout) {
1617                 range = CR_RANGE(insn->chanspec);
1618                 if (range & AO_RANGE_IS_UNIPOLAR)
1619                         devpriv->command6_bits |= DAC_UNIP_BIT(channel);
1620                 else
1621                         devpriv->command6_bits &= ~DAC_UNIP_BIT(channel);
1622                 // write to register
1623                 devpriv->write_byte(devpriv->command6_bits,
1624                         dev->iobase + COMMAND6_REG);
1625         }
1626         // send data
1627         lsb = data[0] & 0xff;
1628         msb = (data[0] >> 8) & 0xff;
1629         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1630         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1631
1632         // remember value for readback
1633         devpriv->ao_value[channel] = data[0];
1634
1635         return 1;
1636 }
1637
1638 // analog output readback insn
1639 static int labpc_ao_rinsn(comedi_device * dev, comedi_subdevice * s,
1640         comedi_insn * insn, lsampl_t * data)
1641 {
1642         if (insn->n == 0)
1643                 return 0;
1644
1645         data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1646
1647         return 1;
1648 }
1649
1650 static int labpc_calib_read_insn(comedi_device * dev, comedi_subdevice * s,
1651         comedi_insn * insn, lsampl_t * data)
1652 {
1653         if (insn->n == 0)
1654                 return 0;
1655
1656         data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)];
1657
1658         return 1;
1659 }
1660
1661 static int labpc_calib_write_insn(comedi_device * dev, comedi_subdevice * s,
1662         comedi_insn * insn, lsampl_t * data)
1663 {
1664         int channel = CR_CHAN(insn->chanspec);
1665
1666         if (insn->n == 0)
1667                 return 0;
1668
1669         write_caldac(dev, channel, data[0]);
1670         return 1;
1671 }
1672
1673 static int labpc_eeprom_read_insn(comedi_device * dev, comedi_subdevice * s,
1674         comedi_insn * insn, lsampl_t * data)
1675 {
1676         if (insn->n == 0)
1677                 return 0;
1678
1679         data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)];
1680
1681         return 1;
1682 }
1683
1684 static int labpc_eeprom_write_insn(comedi_device * dev, comedi_subdevice * s,
1685         comedi_insn * insn, lsampl_t * data)
1686 {
1687         int channel = CR_CHAN(insn->chanspec);
1688         int ret;
1689
1690         // only allow writes to user area of eeprom
1691         if (channel < 16 || channel > 127) {
1692                 printk("eeprom writes are only allowed to channels 16 through 127 (the pointer and user areas)");
1693                 return -EINVAL;
1694         }
1695
1696         if (insn->n == 0)
1697                 return 0;
1698
1699         ret = labpc_eeprom_write(dev, channel, data[0]);
1700         if (ret < 0)
1701                 return ret;
1702
1703         return 1;
1704 }
1705
1706 // utility function that suggests a dma transfer size in bytes
1707 static unsigned int labpc_suggest_transfer_size(comedi_cmd cmd)
1708 {
1709         unsigned int size;
1710         unsigned int freq;
1711
1712         if (cmd.convert_src == TRIG_TIMER)
1713                 freq = 1000000000 / cmd.convert_arg;
1714         // return some default value
1715         else
1716                 freq = 0xffffffff;
1717
1718         // make buffer fill in no more than 1/3 second
1719         size = (freq / 3) * sample_size;
1720
1721         // set a minimum and maximum size allowed
1722         if (size > dma_buffer_size)
1723                 size = dma_buffer_size - dma_buffer_size % sample_size;
1724         else if (size < sample_size)
1725                 size = sample_size;
1726
1727         return size;
1728 }
1729
1730 // figures out what counter values to use based on command
1731 static void labpc_adc_timing(comedi_device * dev, comedi_cmd * cmd)
1732 {
1733         const int max_counter_value = 0x10000;  // max value for 16 bit counter in mode 2
1734         const int min_counter_value = 2;        // min value for 16 bit counter in mode 2
1735         unsigned int base_period;
1736
1737         // if both convert and scan triggers are TRIG_TIMER, then they both rely on counter b0
1738         if (labpc_ai_convert_period(cmd) && labpc_ai_scan_period(cmd)) {
1739                 // pick the lowest b0 divisor value we can (for maximum input clock speed on convert and scan counters)
1740                 devpriv->divisor_b0 = (labpc_ai_scan_period(cmd) - 1) /
1741                         (LABPC_TIMER_BASE * max_counter_value) + 1;
1742                 if (devpriv->divisor_b0 < min_counter_value)
1743                         devpriv->divisor_b0 = min_counter_value;
1744                 if (devpriv->divisor_b0 > max_counter_value)
1745                         devpriv->divisor_b0 = max_counter_value;
1746
1747                 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
1748
1749                 // set a0 for conversion frequency and b1 for scan frequency
1750                 switch (cmd->flags & TRIG_ROUND_MASK) {
1751                 default:
1752                 case TRIG_ROUND_NEAREST:
1753                         devpriv->divisor_a0 =
1754                                 (labpc_ai_convert_period(cmd) +
1755                                 (base_period / 2)) / base_period;
1756                         devpriv->divisor_b1 =
1757                                 (labpc_ai_scan_period(cmd) +
1758                                 (base_period / 2)) / base_period;
1759                         break;
1760                 case TRIG_ROUND_UP:
1761                         devpriv->divisor_a0 =
1762                                 (labpc_ai_convert_period(cmd) + (base_period -
1763                                         1)) / base_period;
1764                         devpriv->divisor_b1 =
1765                                 (labpc_ai_scan_period(cmd) + (base_period -
1766                                         1)) / base_period;
1767                         break;
1768                 case TRIG_ROUND_DOWN:
1769                         devpriv->divisor_a0 =
1770                                 labpc_ai_convert_period(cmd) / base_period;
1771                         devpriv->divisor_b1 =
1772                                 labpc_ai_scan_period(cmd) / base_period;
1773                         break;
1774                 }
1775                 // make sure a0 and b1 values are acceptable
1776                 if (devpriv->divisor_a0 < min_counter_value)
1777                         devpriv->divisor_a0 = min_counter_value;
1778                 if (devpriv->divisor_a0 > max_counter_value)
1779                         devpriv->divisor_a0 = max_counter_value;
1780                 if (devpriv->divisor_b1 < min_counter_value)
1781                         devpriv->divisor_b1 = min_counter_value;
1782                 if (devpriv->divisor_b1 > max_counter_value)
1783                         devpriv->divisor_b1 = max_counter_value;
1784                 // write corrected timings to command
1785                 labpc_set_ai_convert_period(cmd,
1786                         base_period * devpriv->divisor_a0);
1787                 labpc_set_ai_scan_period(cmd,
1788                         base_period * devpriv->divisor_b1);
1789                 // if only one TRIG_TIMER is used, we can employ the generic cascaded timing functions
1790         } else if (labpc_ai_scan_period(cmd)) {
1791                 unsigned int scan_period;
1792
1793                 scan_period = labpc_ai_scan_period(cmd);
1794                 /* calculate cascaded counter values that give desired scan timing */
1795                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1796                         &(devpriv->divisor_b1), &(devpriv->divisor_b0),
1797                         &scan_period, cmd->flags & TRIG_ROUND_MASK);
1798                 labpc_set_ai_scan_period(cmd, scan_period);
1799         } else if (labpc_ai_convert_period(cmd)) {
1800                 unsigned int convert_period;
1801
1802                 convert_period = labpc_ai_convert_period(cmd);
1803                 /* calculate cascaded counter values that give desired conversion timing */
1804                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1805                         &(devpriv->divisor_a0), &(devpriv->divisor_b0),
1806                         &convert_period, cmd->flags & TRIG_ROUND_MASK);
1807                 labpc_set_ai_convert_period(cmd, convert_period);
1808         }
1809 }
1810
1811 static int labpc_dio_mem_callback(int dir, int port, int data,
1812         unsigned long iobase)
1813 {
1814         if (dir) {
1815                 writeb(data, (void *)(iobase + port));
1816                 return 0;
1817         } else {
1818                 return readb((void *)(iobase + port));
1819         }
1820 }
1821
1822 // lowlevel write to eeprom/dac
1823 static void labpc_serial_out(comedi_device * dev, unsigned int value,
1824         unsigned int value_width)
1825 {
1826         int i;
1827
1828         for (i = 1; i <= value_width; i++) {
1829                 // clear serial clock
1830                 devpriv->command5_bits &= ~SCLOCK_BIT;
1831                 // send bits most significant bit first
1832                 if (value & (1 << (value_width - i)))
1833                         devpriv->command5_bits |= SDATA_BIT;
1834                 else
1835                         devpriv->command5_bits &= ~SDATA_BIT;
1836                 comedi_udelay(1);
1837                 devpriv->write_byte(devpriv->command5_bits,
1838                         dev->iobase + COMMAND5_REG);
1839                 // set clock to load bit
1840                 devpriv->command5_bits |= SCLOCK_BIT;
1841                 comedi_udelay(1);
1842                 devpriv->write_byte(devpriv->command5_bits,
1843                         dev->iobase + COMMAND5_REG);
1844         }
1845 }
1846
1847 // lowlevel read from eeprom
1848 static unsigned int labpc_serial_in(comedi_device * dev)
1849 {
1850         unsigned int value = 0;
1851         int i;
1852         const int value_width = 8;      // number of bits wide values are
1853
1854         for (i = 1; i <= value_width; i++) {
1855                 // set serial clock
1856                 devpriv->command5_bits |= SCLOCK_BIT;
1857                 comedi_udelay(1);
1858                 devpriv->write_byte(devpriv->command5_bits,
1859                         dev->iobase + COMMAND5_REG);
1860                 // clear clock bit
1861                 devpriv->command5_bits &= ~SCLOCK_BIT;
1862                 comedi_udelay(1);
1863                 devpriv->write_byte(devpriv->command5_bits,
1864                         dev->iobase + COMMAND5_REG);
1865                 // read bits most significant bit first
1866                 comedi_udelay(1);
1867                 devpriv->status2_bits =
1868                         devpriv->read_byte(dev->iobase + STATUS2_REG);
1869                 if (devpriv->status2_bits & EEPROM_OUT_BIT) {
1870                         value |= 1 << (value_width - i);
1871                 }
1872         }
1873
1874         return value;
1875 }
1876
1877 static unsigned int labpc_eeprom_read(comedi_device * dev, unsigned int address)
1878 {
1879         unsigned int value;
1880         const int read_instruction = 0x3;       // bits to tell eeprom to expect a read
1881         const int write_length = 8;     // 8 bit write lengths to eeprom
1882
1883         // enable read/write to eeprom
1884         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1885         comedi_udelay(1);
1886         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1887         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1888         comedi_udelay(1);
1889         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1890
1891         // send read instruction
1892         labpc_serial_out(dev, read_instruction, write_length);
1893         // send 8 bit address to read from
1894         labpc_serial_out(dev, address, write_length);
1895         // read result
1896         value = labpc_serial_in(dev);
1897
1898         // disable read/write to eeprom
1899         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1900         comedi_udelay(1);
1901         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1902
1903         return value;
1904 }
1905
1906 static unsigned int labpc_eeprom_write(comedi_device * dev,
1907         unsigned int address, unsigned int value)
1908 {
1909         const int write_enable_instruction = 0x6;
1910         const int write_instruction = 0x2;
1911         const int write_length = 8;     // 8 bit write lengths to eeprom
1912         const int write_in_progress_bit = 0x1;
1913         const int timeout = 10000;
1914         int i;
1915
1916         // make sure there isn't already a write in progress
1917         for (i = 0; i < timeout; i++) {
1918                 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
1919                         0)
1920                         break;
1921         }
1922         if (i == timeout) {
1923                 comedi_error(dev, "eeprom write timed out");
1924                 return -ETIME;
1925         }
1926         // update software copy of eeprom
1927         devpriv->eeprom_data[address] = value;
1928
1929         // enable read/write to eeprom
1930         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1931         comedi_udelay(1);
1932         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1933         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1934         comedi_udelay(1);
1935         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1936
1937         // send write_enable instruction
1938         labpc_serial_out(dev, write_enable_instruction, write_length);
1939         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1940         comedi_udelay(1);
1941         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1942
1943         // send write instruction
1944         devpriv->command5_bits |= EEPROM_EN_BIT;
1945         comedi_udelay(1);
1946         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1947         labpc_serial_out(dev, write_instruction, write_length);
1948         // send 8 bit address to write to
1949         labpc_serial_out(dev, address, write_length);
1950         // write value
1951         labpc_serial_out(dev, value, write_length);
1952         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1953         comedi_udelay(1);
1954         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1955
1956         // disable read/write to eeprom
1957         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1958         comedi_udelay(1);
1959         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1960
1961         return 0;
1962 }
1963
1964 static unsigned int labpc_eeprom_read_status(comedi_device * dev)
1965 {
1966         unsigned int value;
1967         const int read_status_instruction = 0x5;
1968         const int write_length = 8;     // 8 bit write lengths to eeprom
1969
1970         // enable read/write to eeprom
1971         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1972         comedi_udelay(1);
1973         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1974         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1975         comedi_udelay(1);
1976         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1977
1978         // send read status instruction
1979         labpc_serial_out(dev, read_status_instruction, write_length);
1980         // read result
1981         value = labpc_serial_in(dev);
1982
1983         // disable read/write to eeprom
1984         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1985         comedi_udelay(1);
1986         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1987
1988         return value;
1989 }
1990
1991 // writes to 8 bit calibration dacs
1992 static void write_caldac(comedi_device * dev, unsigned int channel,
1993         unsigned int value)
1994 {
1995         if (value == devpriv->caldac[channel])
1996                 return;
1997         devpriv->caldac[channel] = value;
1998
1999         // clear caldac load bit and make sure we don't write to eeprom
2000         devpriv->command5_bits &=
2001                 ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
2002         comedi_udelay(1);
2003         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2004
2005         // write 4 bit channel
2006         labpc_serial_out(dev, channel, 4);
2007         // write 8 bit caldac value
2008         labpc_serial_out(dev, value, 8);
2009
2010         // set and clear caldac bit to load caldac value
2011         devpriv->command5_bits |= CALDAC_LOAD_BIT;
2012         comedi_udelay(1);
2013         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2014         devpriv->command5_bits &= ~CALDAC_LOAD_BIT;
2015         comedi_udelay(1);
2016         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
2017 }
2018
2019 #ifdef CONFIG_COMEDI_PCI
2020 COMEDI_PCI_INITCLEANUP(driver_labpc, labpc_pci_table);
2021 #else
2022 COMEDI_INITCLEANUP(driver_labpc);
2023 #endif
2024
2025 EXPORT_SYMBOL_GPL(labpc_common_attach);
2026 EXPORT_SYMBOL_GPL(labpc_common_detach);
2027 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
2028 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
2029 EXPORT_SYMBOL_GPL(labpc_1200_is_unipolar);