From d9284d682a7f68bce8934017665e56eeccf4413a Mon Sep 17 00:00:00 2001 From: =?utf8?q?Micha=C5=82=20G=C3=B3rny?= Date: Tue, 15 Aug 2017 13:19:07 +0200 Subject: [PATCH] sys-devel/clang: Disable RISCV following upstream --- sys-devel/clang/clang-5.0.9999.ebuild | 2 +- sys-devel/clang/clang-9999.ebuild | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/sys-devel/clang/clang-5.0.9999.ebuild b/sys-devel/clang/clang-5.0.9999.ebuild index df33aa3a8b7a..268b06fbc7ba 100644 --- a/sys-devel/clang/clang-5.0.9999.ebuild +++ b/sys-devel/clang/clang-5.0.9999.ebuild @@ -20,7 +20,7 @@ EGIT_BRANCH="release_50" # Keep in sync with sys-devel/llvm ALL_LLVM_TARGETS=( AArch64 AMDGPU ARM BPF Hexagon Lanai Mips MSP430 - NVPTX PowerPC RISCV Sparc SystemZ X86 XCore ) + NVPTX PowerPC Sparc SystemZ X86 XCore ) ALL_LLVM_TARGETS=( "${ALL_LLVM_TARGETS[@]/#/llvm_targets_}" ) LLVM_TARGET_USEDEPS=${ALL_LLVM_TARGETS[@]/%/?} diff --git a/sys-devel/clang/clang-9999.ebuild b/sys-devel/clang/clang-9999.ebuild index 57378c25ed3f..73335e4fa4f4 100644 --- a/sys-devel/clang/clang-9999.ebuild +++ b/sys-devel/clang/clang-9999.ebuild @@ -19,7 +19,7 @@ EGIT_REPO_URI="https://git.llvm.org/git/clang.git # Keep in sync with sys-devel/llvm ALL_LLVM_TARGETS=( AArch64 AMDGPU ARM BPF Hexagon Lanai Mips MSP430 - NVPTX PowerPC RISCV Sparc SystemZ X86 XCore ) + NVPTX PowerPC Sparc SystemZ X86 XCore ) ALL_LLVM_TARGETS=( "${ALL_LLVM_TARGETS[@]/#/llvm_targets_}" ) LLVM_TARGET_USEDEPS=${ALL_LLVM_TARGETS[@]/%/?} -- 2.26.2