From 969baa4fc3144f45047e4738c39af0d832f656d1 Mon Sep 17 00:00:00 2001 From: Frank Mori Hess Date: Fri, 23 May 2003 23:04:55 +0000 Subject: [PATCH] still trying to fix 6110 initialization problem, plus a tiny bit of random cleanup --- comedi/drivers/ni_mio_common.c | 17 ++++++++++------- comedi/drivers/ni_pcimio.c | 16 ++++++++-------- comedi/drivers/ni_stc.h | 15 +++++++-------- 3 files changed, 25 insertions(+), 23 deletions(-) diff --git a/comedi/drivers/ni_mio_common.c b/comedi/drivers/ni_mio_common.c index bbc37961..ce730ba7 100644 --- a/comedi/drivers/ni_mio_common.c +++ b/comedi/drivers/ni_mio_common.c @@ -961,7 +961,7 @@ static void get_last_sample_611x( comedi_device *dev ) if( boardtype.reg_611x == 0 ) return; /* Check if there's a single sample stuck in the FIFO */ - if(ni_readb(Status_611x)&0x80){ + if(ni_readb(XXX_Status)&0x80){ dl=ni_readl(ADC_FIFO_Data_611x); data = (dl&0xffff) + devpriv->ai_offset[async->cur_chan++]; async->cur_chan %= async->cmd.chanlist_len; @@ -1064,9 +1064,8 @@ static int ni_ai_reset(comedi_device *dev,comedi_subdevice *s) #ifdef PCIDMA mite_dma_disarm(devpriv->mite, AI_DMA_CHAN); #endif - win_out(AI_Reset,Joint_Reset_Register); /* ai configuration */ - win_out(AI_Configuration_Start,Joint_Reset_Register); + win_out( AI_Configuration_Start | AI_Reset, Joint_Reset_Register ); ni_set_bits(dev, Interrupt_A_Enable_Register, AI_SC_TC_Interrupt_Enable | AI_START1_Interrupt_Enable| @@ -1074,8 +1073,6 @@ static int ni_ai_reset(comedi_device *dev,comedi_subdevice *s) AI_STOP_Interrupt_Enable| AI_Error_Interrupt_Enable| AI_FIFO_Interrupt_Enable,0); - // XXX do interrupt ack - win_out(1,ADC_FIFO_Clear); ni_writeb(0, Misc_Command); @@ -1166,7 +1163,7 @@ static int ni_ai_insn_read(comedi_device *dev,comedi_subdevice *s,comedi_insn *i /* The 611x has screwy 32-bit FIFOs. */ d = 0; for(i=0; i> 16 ) & 0xffff; break; @@ -2553,6 +2550,12 @@ static int ni_E_init(comedi_device *dev,comedi_devconfig *it) bits |= 1 << ( GPC1_DMA_CHAN + 4 ); ni_writeb( bits, G0_G1_Select); + /* 611x init */ + if( boardtype.reg_611x ) + { + ni_writeb( 0, Magic_611x ); + } + printk("\n"); return 0; @@ -2603,7 +2606,7 @@ static int ni_read_eeprom(comedi_device *dev,int addr) for(bit=0x80;bit;bit>>=1){ ni_writeb(0x04,Serial_Command); ni_writeb(0x05,Serial_Command); - bitstring|=((ni_readb(XXX_Status)&0x01)?bit:0); + bitstring|=((ni_readb(XXX_Status)&PROMOUT)?bit:0); } ni_writeb(0x00,Serial_Command); diff --git a/comedi/drivers/ni_pcimio.c b/comedi/drivers/ni_pcimio.c index 3a286ab8..c9a3d51e 100644 --- a/comedi/drivers/ni_pcimio.c +++ b/comedi/drivers/ni_pcimio.c @@ -735,9 +735,9 @@ static int pcimio_detach(comedi_device *dev) static int pcimio_attach(comedi_device *dev,comedi_devconfig *it) { int ret; - + printk("comedi%d: ni_pcimio:",dev->minor); - + ret=alloc_private(dev,sizeof(ni_private)); if(ret<0)return ret; @@ -746,7 +746,7 @@ static int pcimio_attach(comedi_device *dev,comedi_devconfig *it) printk(" %s",boardtype.name); dev->board_name=boardtype.name; - + ret = mite_setup(devpriv->mite); if(ret < 0) { @@ -757,14 +757,14 @@ static int pcimio_attach(comedi_device *dev,comedi_devconfig *it) dev->irq=mite_irq(devpriv->mite); - if(dev->irq==0){ + if(dev->irq==0){ printk(" unknown irq (bad)\n"); }else{ - printk(" ( irq = %d )",dev->irq); - if( (ret=comedi_request_irq(dev->irq,ni_E_interrupt,NI_E_IRQ_FLAGS,"ni_pcimio",dev))<0 ){ - printk(" irq not available\n"); + printk(" ( irq = %d )",dev->irq); + if( (ret=comedi_request_irq(dev->irq,ni_E_interrupt,NI_E_IRQ_FLAGS,"ni_pcimio",dev))<0 ){ + printk(" irq not available\n"); dev->irq=0; - } + } } ret = ni_E_init(dev,it); diff --git a/comedi/drivers/ni_stc.h b/comedi/drivers/ni_stc.h index ef238336..c4c16d92 100644 --- a/comedi/drivers/ni_stc.h +++ b/comedi/drivers/ni_stc.h @@ -361,6 +361,8 @@ enum AO_FIFO_Mode_Bits #define AI_Configuration_End _bit8 #define AO_Configuration_Start _bit5 #define AI_Configuration_Start _bit4 +#define G1_Reset _bit3 +#define G0_Reset _bit2 #define AO_Reset _bit1 #define AI_Reset _bit0 @@ -531,8 +533,6 @@ enum AO_Personal_Bits #define G0_Save_St _bit0 /* general purpose counter timer */ -#define G0_Reset _bit2 -#define G1_Reset _bit3 #define G0_TC_Interrupt_Enable _bit6 #define G1_TC_Interrupt_Enable _bit9 #define G0_Gate_Interrupt_Enable _bit8 @@ -588,6 +588,11 @@ enum AO_Personal_Bits /* 8 bit registers */ #define XXX_Status 0x01 +enum XXX_Status_Bits +{ + PROMOUT = 0x1, + AI_FIFO_LOWER_NOT_EMPTY = 0x8, +}; #define Serial_Command 0x0d #define Misc_Command 0x0f #define Port_A 0x19 @@ -639,16 +644,10 @@ static inline unsigned int AI_CONFIG_CHANNEL( unsigned int channel ) /* 611x registers (these boards differ from the e-series) */ #define Magic_611x 0x19 /* w8 (new) */ -#define Status_611x 0x01 /* r8 (additional bits) */ -enum Status_611x_Bits -{ - AI_FIFO_LOWER_NOT_EMPTY = 0x8, -}; #define Calibration_Channel_Select_611x 0x1a /* w16 (new) */ #define ADC_FIFO_Data_611x 0x1c /* r32 (incompatible) */ #define AI_FIFO_Offset_Load_611x 0x05 /* r8 (new) */ #define AO_FIFO_Offset_Load_611x 0x13 /* W32? */ -#define AO_Configuration_611x 0x16 /* w16 */ #define DAC_FIFO_Data_611x 0x14 /* w32 (incompatible) */ #define AO_Window_Addr_611x 0x18 /* w16 */ #define AO_Window_Data_611x 0x1e /* w16 */ -- 2.26.2