From: Mike Gilbert <floppym@gentoo.org>
Date: Wed, 22 Mar 2017 02:38:56 +0000 (-0400)
Subject: www-client/chromium: work around skia build failure with GCC
X-Git-Url: http://git.tremily.us/gitweb.cgi?a=commitdiff_plain;h=f8a72fe420751ebd6d1e3c32410e16a2008de0ac;p=gentoo.git

www-client/chromium: work around skia build failure with GCC

Bug: https://bugs.gentoo.org/608640
Package-Manager: Portage-2.3.5_p2, Repoman-2.3.2_p32
---

diff --git a/www-client/chromium/chromium-58.0.3029.19.ebuild b/www-client/chromium/chromium-58.0.3029.19.ebuild
index df09c5655f09..9a0f942fca02 100644
--- a/www-client/chromium/chromium-58.0.3029.19.ebuild
+++ b/www-client/chromium/chromium-58.0.3029.19.ebuild
@@ -200,6 +200,7 @@ src_prepare() {
 		"${FILESDIR}/${PN}-widevine-r1.patch"
 		"${FILESDIR}/${PN}-FORTIFY_SOURCE.patch"
 		"${FILESDIR}/${PN}-gn-bootstrap-r2.patch"
+		"${FILESDIR}/skia-avx2.patch"
 	)
 
 	use system-ffmpeg && PATCHES+=( "${FILESDIR}/${PN}-system-ffmpeg-r4.patch" )
diff --git a/www-client/chromium/chromium-59.0.3043.0.ebuild b/www-client/chromium/chromium-59.0.3043.0.ebuild
index 2d43ee973712..8c0d3caf2ee2 100644
--- a/www-client/chromium/chromium-59.0.3043.0.ebuild
+++ b/www-client/chromium/chromium-59.0.3043.0.ebuild
@@ -200,6 +200,7 @@ src_prepare() {
 		"${FILESDIR}/${PN}-widevine-r1.patch"
 		"${FILESDIR}/${PN}-FORTIFY_SOURCE.patch"
 		"${FILESDIR}/${PN}-gn-bootstrap-r3.patch"
+		"${FILESDIR}/skia-avx2.patch"
 	)
 
 	use system-ffmpeg && PATCHES+=( "${FILESDIR}/${PN}-system-ffmpeg-r4.patch" )
diff --git a/www-client/chromium/files/skia-avx2.patch b/www-client/chromium/files/skia-avx2.patch
new file mode 100644
index 000000000000..a1b530990c02
--- /dev/null
+++ b/www-client/chromium/files/skia-avx2.patch
@@ -0,0 +1,15 @@
+Disable AVX2 code to prevent build failure with GCC
+
+Bug: https://bugs.gentoo.org/608640
+
+--- a/third_party/skia/include/core/SkPreConfig.h
++++ b/third_party/skia/include/core/SkPreConfig.h
+@@ -125,7 +125,7 @@
+     // These checks must be done in descending order to ensure we set the highest
+     // available SSE level.
+     #if defined(__AVX2__)
+-        #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_AVX2
++        #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_AVX
+     #elif defined(__AVX__)
+         #define SK_CPU_SSE_LEVEL    SK_CPU_SSE_LEVEL_AVX
+     #elif defined(__SSE4_2__)