From: Andreas K. Hüttel <dilfridge@gentoo.org>
Date: Tue, 28 May 2019 22:57:21 +0000 (+0200)
Subject: toolchain.eclass: add riscv compiler abi configuration
X-Git-Url: http://git.tremily.us/gitweb.cgi?a=commitdiff_plain;h=7029bfc24ddf8702d76d2aa88d39790b15c47961;p=gentoo.git

toolchain.eclass: add riscv compiler abi configuration

Signed-off-by: Andreas K. Hüttel <dilfridge@gentoo.org>
---

diff --git a/eclass/toolchain.eclass b/eclass/toolchain.eclass
index cf6a95337219..3d997fb65819 100644
--- a/eclass/toolchain.eclass
+++ b/eclass/toolchain.eclass
@@ -1213,6 +1213,10 @@ toolchain_src_configure() {
 		is-flagq -mfloat-gprs=double && confgcc+=( --enable-e500-double )
 		[[ ${CTARGET//_/-} == *-e500v2-* ]] && confgcc+=( --enable-e500-double )
 		;;
+	riscv)
+		# Add --with-abi flags to set default ABI
+		confgcc+=( --with-abi=$(gcc-abi-map ${TARGET_DEFAULT_ABI}) )
+		;;
 	esac
 
 	# if the target can do biarch (-m32/-m64), enable it.  overhead should
@@ -1640,6 +1644,7 @@ gcc-abi-map() {
 	local map=()
 	case ${CTARGET} in
 	mips*)   map=("o32 32" "n32 n32" "n64 64") ;;
+	riscv*)  map=("lp64d lp64d" "lp64 lp64") ;;
 	x86_64*) map=("amd64 m64" "x86 m32" "x32 mx32") ;;
 	esac