From: David Seifert Date: Sat, 25 Nov 2017 16:48:47 +0000 (+0100) Subject: sci-electronics/balsa: [QA] Consistent whitespace in metadata.xml X-Git-Url: http://git.tremily.us/gitweb.cgi?a=commitdiff_plain;h=5d242c789b15af78b82671d075b8ce5d0579bb14;p=gentoo.git sci-electronics/balsa: [QA] Consistent whitespace in metadata.xml --- diff --git a/sci-electronics/balsa/metadata.xml b/sci-electronics/balsa/metadata.xml index d547549944cb..8b31894ded35 100644 --- a/sci-electronics/balsa/metadata.xml +++ b/sci-electronics/balsa/metadata.xml @@ -6,11 +6,11 @@ Gentoo Electronics Project - Balsa is an asynchronous circuit synthesis system developed over a number of - years at the APT group of the School Of Computer Science, The University of - Manchester. Balsa is built around the Handshake Circuits methology and can - generate gate level netlists from high-level descriptions in the Balsa - language. Both dual-rail (QDI) and single-rail (bundled data) circuits can be - generated. - + Balsa is an asynchronous circuit synthesis system developed over a number of + years at the APT group of the School Of Computer Science, The University of + Manchester. Balsa is built around the Handshake Circuits methology and can + generate gate level netlists from high-level descriptions in the Balsa + language. Both dual-rail (QDI) and single-rail (bundled data) circuits can be + generated. +