profiles/desc/llvm_targets.desc: RISCV & WASM are no longer exp

Signed-off-by: Michał Górny <mgorny@gentoo.org>

diff --git a/profiles/desc/llvm_targets.desc b/profiles/desc/llvm_targets.desc
index e83d886dedb91a6b520d65cf4487bf15724633a6..6a45455f4c3805fabce0440962162d8fe210df8f 100644 (file)
--- a/profiles/desc/llvm_targets.desc
+++ b/profiles/desc/llvm_targets.desc
@@ -12,9 +12,9 @@ Mips - MIPS CPU target (includes MIPS64)
 MSP430 - MSP430 CPU target (experimental)
 NVPTX - NVIDIA PTX (GPU) target (32-bit and 64-bit)
 PowerPC - PowerPC CPU target (PPC32 and PPC64)
-RISCV - RISC-V CPU target [EXPERIMENTAL]
+RISCV - RISC-V CPU target
 Sparc - Sparc CPU target
 SystemZ - SystemZ (s390x) CPU target
-WebAssembly - WebAssembly backend [EXPERIMENTAL]
+WebAssembly - WebAssembly backend
 X86 - X86 CPU target (includes amd64)
 XCore - XCore CPU target