amplc_dio200: Add 32-bit register access functions.
authorIan Abbott <abbotti@mev.co.uk>
Mon, 28 May 2012 09:40:42 +0000 (10:40 +0100)
committerIan Abbott <abbotti@mev.co.uk>
Mon, 28 May 2012 09:40:42 +0000 (10:40 +0100)
These will be used to support extra features of the PCIe boards.

Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
comedi/drivers/amplc_dio200.c

index 27c1375d1560fda057bcf37e1fcc64440f7c1e04..1b9c660740988dd2ffa76042d575d7c874bf3312 100644 (file)
@@ -681,6 +681,35 @@ static void dio200_write8(comedi_device * dev, unsigned int offset,
                writeb(val, devpriv->io.u.membase + offset);
 }
 
+/*
+ * Read 32-bit register.
+ */
+#ifdef CONFIG_COMEDI_PCI
+static unsigned int dio200_read32(comedi_device * dev, unsigned int offset)
+{
+       offset <<= devpriv->io.regshift;
+       if (devpriv->io.regtype == io_regtype)
+               return inl(devpriv->io.u.iobase + offset);
+       else
+               return readl(devpriv->io.u.membase + offset);
+}
+#endif
+
+/*
+ * Write 32-bit register.
+ */
+#ifdef CONFIG_COMEDI_PCI
+static void dio200_write32(comedi_device * dev, unsigned int offset,
+               unsigned int val)
+{
+       offset <<= devpriv->io.regshift;
+       if (devpriv->io.regtype == io_regtype)
+               outl(val, devpriv->io.u.iobase + offset);
+       else
+               writel(val, devpriv->io.u.membase + offset);
+}
+#endif
+
 /*
  * This function looks for a PCI device matching the requested board name,
  * bus and slot.