Makefile: Link to pattern rule documentation

[assignment-template.git] / Makefile

diff --git a/Makefile b/Makefile
index 2316c1de81acecd0c13ae45147f08d3982b4a398..b8b7787e5f4b4e9595765212b6b8b9513b78ecef 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -135,10 +135,13 @@ $(CXX_PROGRAMS): % : $$($$(*)_OBJECTS)
 run: $(PROGRAMS)
        ./$(RUN_PROGRAM)
 
-# Matching rule for compiling object files from C++ source
+# Pattern rule for compiling object files from C++ source
 # There is an implicit rule for this in GNU make
 #   http://www.gnu.org/software/make/manual/html_node/Catalogue-of-Rules.html
-# but I redefine it here for clarity.
+# but I redefine it here for clarity.  For an explanation of the
+#   %.o: %.cpp
+# syntax, see
+#   http://www.gnu.org/software/make/manual/html_node/Pattern-Intro.html
 #
 # CXX and CXXFLAGS have defaults defined by make
 #   http://www.gnu.org/software/make/manual/html_node/Implicit-Variables.html
@@ -149,7 +152,7 @@ run: $(PROGRAMS)
 %.o: %.cpp
        $(CXX) $(CXXFLAGS) -c $<
 
-# Matching rule for compiling object files from C source
+# Pattern rule for compiling object files from C source
 # The comments from the C++ rule above also apply here
 %.o: %.c
        $(CC) $(CFLAGS) -c $<