From: David Schleef Date: Sun, 17 Mar 2002 22:01:42 +0000 (+0000) Subject: More work on 611x support. Documentation updates. X-Git-Tag: r0_7_64~45 X-Git-Url: http://git.tremily.us/?a=commitdiff_plain;h=fb2995190d0c3369550f6e07110e62606928a09b;p=comedi.git More work on 611x support. Documentation updates. --- diff --git a/comedi/drivers/ni_atmio.c b/comedi/drivers/ni_atmio.c index 0da2920e..f4146ab6 100644 --- a/comedi/drivers/ni_atmio.c +++ b/comedi/drivers/ni_atmio.c @@ -26,17 +26,13 @@ Author: ds Devices: [National Instruments] AT-MIO-16E-1 (ni_atmio), AT-MIO-16E-2, AT-MIO-16E-10, AT-MIO-16DE-10, AT-MIO-64E-3, AT-MIO-16XE-50, AT-MIO-16XE-10, AT-AI-16XE-10 +Status: works +Updated: Sat, 16 Mar 2002 17:34:48 -0800 The isapnptools package is required to use this board. Use isapnp to configure the I/O base for the board, and then pass the same value as a parameter in comedi_config. A sample isapnp.conf file is included -in the etc/ directory. - -Assuming that the NI spec is correct, the driver should correctly -identify every board in the series. Each channel should have the -appropriate parameters, i.e., input/output ranges, number of bits, -etc. If the driver fails to recognize your card or does not have -the correct parameters, please contact me. +in the etc/ directory of Comedilib. Comedilib includes a utility to autocalibrate these boards. The boards seem to boot into a state where the all calibration DACs @@ -45,6 +41,9 @@ is terrible. Calibration at boot is strongly encouraged. External triggering is supported for some events. The channel index (scan_begin_arg, etc.) maps to PFI0 - PFI9. + +Some of the more esoteric triggering possibilities of these boards +are not supported. */ /* The real guts of the driver is in ni_mio_common.c, which is included @@ -246,6 +245,8 @@ static int ni_irqpin[]={-1,-1,-1,0,1,2,-1,3,-1,-1,4,5,6,-1,-1,7}; /* How we access registers */ +#define ni_writel(a,b) (outl((a),(b)+dev->iobase)) +#define ni_readl(a) (inl((a)+dev->iobase)) #define ni_writew(a,b) (outw((a),(b)+dev->iobase)) #define ni_readw(a) (inw((a)+dev->iobase)) #define ni_writeb(a,b) (outb((a),(b)+dev->iobase)) diff --git a/comedi/drivers/ni_mio_common.c b/comedi/drivers/ni_mio_common.c index 60b1bbbb..5ea85611 100644 --- a/comedi/drivers/ni_mio_common.c +++ b/comedi/drivers/ni_mio_common.c @@ -711,10 +711,59 @@ static void ni_handle_fifo_dregs(comedi_device *dev) int i,n; int j; unsigned int mask; + unsigned int dl; mask=(1<async->cur_chan; data=s->async->data+s->async->buf_int_ptr; + if(boardtype.reg_611x){ + while(1){ + n=(s->async->data_len-s->async->buf_int_ptr)/sizeof(sampl_t); + for(i=0;iai_xorlist[j]; + j++; + if(j>=s->async->cmd.chanlist_len){ + j=0; + } + data++; + s->async->buf_int_ptr+=sizeof(sampl_t); + s->async->buf_int_count+=sizeof(sampl_t); + } + s->async->cur_chan=j; + return; + } + dl=ni_readl(ADC_FIFO_Data_611x); + + /* This may get the hi/lo data in the wrong order */ + *data = (dl>>16) + devpriv->ai_xorlist[j]; + j++; + if(j>=s->async->cmd.chanlist_len){ + j=0; + //s->events |= COMEDI_CB_EOS; + } + data++; + s->async->buf_int_ptr+=sizeof(sampl_t); + s->async->buf_int_count+=sizeof(sampl_t); + + *data = (dl&0xffff) + devpriv->ai_xorlist[j]; + j++; + if(j>=s->async->cmd.chanlist_len){ + j=0; + //s->events |= COMEDI_CB_EOS; + } + data++; + s->async->buf_int_ptr+=sizeof(sampl_t); + s->async->buf_int_count+=sizeof(sampl_t); + } + s->async->buf_int_ptr=0; + data=s->async->data; + s->async->events |= COMEDI_CB_EOBUF; + } + }else{ while(1){ n=(s->async->data_len-s->async->buf_int_ptr)/sizeof(sampl_t); for(i=0;iasync->data; s->async->events |= COMEDI_CB_EOBUF; } + } } #ifdef PCIDMA @@ -787,10 +837,6 @@ static void ni_ai_setup_MITE_dma(comedi_device *dev,comedi_cmd *cmd) mite->dir = COMEDI_INPUT; mite_prep_dma(mite); - /*tell the STC to use DMA0 for AI. - Select the MITE DMA channel to use, 0x01=A*/ - ni_writeb(0x01,AI_AO_Select); - /*start the MITE*/ mite_dma_arm(mite); } @@ -892,17 +938,29 @@ static int ni_ai_insn_read(comedi_device *dev,comedi_subdevice *s,comedi_insn *i signbits=devpriv->ai_xorlist[0]; for(n=0;nn;n++){ win_out(1,AI_Command_1_Register); - for(i=0;in; @@ -2141,6 +2199,11 @@ static int ni_E_init(comedi_device *dev,comedi_devconfig *it) ); } + /* DMA setup */ + /* tell the STC to use DMA0 for AI, DMA1 for AO */ + ni_writeb(0x21,AI_AO_Select); + + /* PFI setup */ pfi_setup(dev); printk("\n"); diff --git a/comedi/drivers/ni_mio_cs.c b/comedi/drivers/ni_mio_cs.c index 7ebd2fd9..6fe943fd 100644 --- a/comedi/drivers/ni_mio_cs.c +++ b/comedi/drivers/ni_mio_cs.c @@ -158,6 +158,8 @@ static ni_board ni_boards[]={ /* How we access registers */ +#define ni_writel(a,b) (outl((a),(b)+dev->iobase)) +#define ni_readl(a) (inl((a)+dev->iobase)) #define ni_writew(a,b) (outw((a),(b)+dev->iobase)) #define ni_readw(a) (inw((a)+dev->iobase)) #define ni_writeb(a,b) (outb((a),(b)+dev->iobase)) diff --git a/comedi/drivers/ni_pcimio.c b/comedi/drivers/ni_pcimio.c index 21063419..07db3c84 100644 --- a/comedi/drivers/ni_pcimio.c +++ b/comedi/drivers/ni_pcimio.c @@ -24,17 +24,18 @@ Driver: ni_pcimio.o Description: National Instruments PCI-MIO-E series (all boards) Author: ds -Status: mainly limited by Comedi infrastructure +Status: works Devices: [National Instruments] PCI-MIO-16XE-50 (ni_pcimio), PCI-MIO-16XE-10, PXI-6030E, PCI-MIO-16E-1, PCI-MIO-16E-4, PCI-6040E, PXI-6040E, PCI-6031E, PCI-6032E, PCI-6033E, PCI-6071E, PCI-6023E, PCI-6024E, PCI-6025E, PXI-6025E, PCI-6034E, PCI-6035E, PCI-6052E, PCI-6110E, PCI-6111E, PCI-6711, PCI-6713, PXI-6071E, PXI-6070E, PXI-6052E, PCI-6036E, PCI-6731, PCI-6733 +Updated: Sat, 16 Mar 2002 17:34:48 -0800 These boards are almost identical to the AT-MIO E series, except that -they use the PCI bus instead of ISA (i.e., AT). See the notes above for -ni_atmio.o for additional information about these boards. +they use the PCI bus instead of ISA (i.e., AT). See the notes for +the ni_atmio.o driver for additional information about these boards. Autocalibration is supported on many of the devices, using the calibration utility in Comedilib. @@ -49,10 +50,13 @@ PCI IDs are not known for PCI-6731 and PCI-6733. Digital I/O may not work on 673x. Information (number of channels, bits, etc.) for some devices may be -incorrect. +incorrect. Please check this and submit a bug if there are problems +for your device. Bugs: - - Driver doesn't stop correctly when DMA is enabled. + - When DMA is enabled, COMEDI_EV_SCAN_END and COMEDI_EV_CONVERT do + not work correctly. + - There are reported problems with the 61xx and 67xx boards. */ /* @@ -584,6 +588,8 @@ COMEDI_INITCLEANUP(driver_pcimio); /* How we access registers */ +#define ni_writel(a,b) (writel((a),dev->iobase+(b))) +#define ni_readl(a) (readl(dev->iobase+(a))) #define ni_writew(a,b) (writew((a),dev->iobase+(b))) #define ni_readw(a) (readw(dev->iobase+(a))) #define ni_writeb(a,b) (writeb((a),dev->iobase+(b)))