From: Matt Turner Date: Tue, 28 Jun 2011 00:54:25 +0000 (-0400) Subject: mips.py: include R4x00 and loongson workarounds in mips3 X-Git-Tag: CATALYST_2_0_6_917~2 X-Git-Url: http://git.tremily.us/?a=commitdiff_plain;h=b03eff5c0d2eb9e4dab64d5a1fd3ceb0e9c8a7d4;p=catalyst.git mips.py: include R4x00 and loongson workarounds in mips3 --- diff --git a/arch/mips.py b/arch/mips.py index a83dd17b..c04771f3 100644 --- a/arch/mips.py +++ b/arch/mips.py @@ -46,26 +46,26 @@ class arch_mips3(generic_mips): "Builder class for MIPS III [Big-endian]" def __init__(self,myspec): generic_mips.__init__(self,myspec) - self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -pipe" + self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -mfix-r4000 -mfix-r4400 -pipe" class arch_mips3_n32(generic_mips64): "Builder class for MIPS III [Big-endian N32]" def __init__(self,myspec): generic_mips64.__init__(self,myspec) - self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -pipe" + self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -mfix-r4000 -mfix-r4400 -pipe" class arch_mips3_n64(generic_mips64): "Builder class for MIPS III [Big-endian N64]" def __init__(self,myspec): generic_mips64.__init__(self,myspec) - self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -pipe" + self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -mfix-r4000 -mfix-r4400 -pipe" class arch_mips3_multilib(generic_mips64,generic_multilib): "Builder class for MIPS III [Big-endian multilib]" def __init__(self,myspec): generic_mips64.__init__(self,myspec) generic_multilib.__init__(self,myspec) - self.settings["CFLAGS"]="-O2 -mips3 -pipe" + self.settings["CFLAGS"]="-O2 -mips3 -mfix-r4000 -mfix-r4400 -pipe" class arch_mips4(generic_mips64): "Builder class for MIPS IV [Big-endian]" @@ -102,26 +102,26 @@ class arch_mipsel3(generic_mipsel): "Builder class for all MIPS III [Little-endian]" def __init__(self,myspec): generic_mipsel.__init__(self,myspec) - self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -pipe" + self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -Wa,-mfix-loongson2f-nop -pipe" class arch_mipsel3_n32(generic_mips64el): "Builder class for all MIPS III [Little-endian N32]" def __init__(self,myspec): generic_mips64el.__init__(self,myspec) - self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -pipe" + self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -Wa,-mfix-loongson2f-nop -pipe" class arch_mipsel3_n64(generic_mips64el): "Builder class for MIPS III [Little-endian N64]" def __init__(self,myspec): generic_mips64el.__init__(self,myspec) - self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -pipe" + self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -Wa,-mfix-loongson2f-nop -pipe" class arch_mipsel3_multilib(generic_mips64el,generic_multilib): "Builder class for MIPS III [Little-endian multilib]" def __init__(self,myspec): generic_mips64el.__init__(self,myspec) generic_multilib.__init__(self,myspec) - self.settings["CFLAGS"]="-O2 -mips3 -pipe" + self.settings["CFLAGS"]="-O2 -mips3 -Wa,-mfix-loongson2f-nop -pipe" class arch_loongson2e(generic_mipsel): "Builder class for all Loongson 2E [Little-endian]"