From: Agostino Sarubbo Date: Sun, 22 Mar 2020 10:37:36 +0000 (+0100) Subject: sci-electronics/iverilog: x86 stable wrt bug #713730 X-Git-Url: http://git.tremily.us/?a=commitdiff_plain;h=9c8c28d4cc9a710614001e714aad50a872ccf74b;p=gentoo.git sci-electronics/iverilog: x86 stable wrt bug #713730 Package-Manager: Portage-2.3.89, Repoman-2.3.20 RepoMan-Options: --include-arches="x86" Signed-off-by: Agostino Sarubbo --- diff --git a/sci-electronics/iverilog/iverilog-10.3.ebuild b/sci-electronics/iverilog/iverilog-10.3.ebuild index abb406c6c94d..b4ec60511989 100644 --- a/sci-electronics/iverilog/iverilog-10.3.ebuild +++ b/sci-electronics/iverilog/iverilog-10.3.ebuild @@ -18,7 +18,7 @@ if [[ ${PV} == "9999" ]] ; then EGIT_REPO_URI="https://github.com/steveicarus/${PN}.git" else SRC_URI="https://github.com/steveicarus/${PN}/archive/v${GITHUB_PV}.tar.gz -> ${P}.tar.gz" - KEYWORDS="~alpha amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sh ~sparc ~x86" + KEYWORDS="~alpha amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sh ~sparc x86" S="${WORKDIR}/${PN}-${GITHUB_PV}" fi