From: John P. Davis <zhen@gentoo.org>
Date: Wed, 14 Jan 2004 06:21:56 +0000 (+0000)
Subject: added mips patches
X-Git-Tag: CATALYST_1_0_1~84
X-Git-Url: http://git.tremily.us/?a=commitdiff_plain;h=6f39ba21cb6532d0fc5fd21e19ee65c483828c86;p=catalyst.git

added mips patches


git-svn-id: svn+ssh://svn.gentoo.org/var/svnroot/catalyst/trunk@156 d1e1f19c-881f-0410-ab34-b69fee027534
---

diff --git a/ChangeLog b/ChangeLog
index 614ebcc0..69620db0 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,9 @@
 # ChangeLog for gentoo/src/catalyst 
-# Copyright 2002-2003 Gentoo Technologies, Inc.; Distributed under the GPL v2
-# $Header: /var/cvsroot/gentoo/src/catalyst/ChangeLog,v 1.14 2003/12/16 14:40:59 gmsoft Exp $
+# Copyright 2002-2004 Gentoo Technologies, Inc.; Distributed under the GPL v2
+# $Header: /var/cvsroot/gentoo/src/catalyst/ChangeLog,v 1.15 2004/01/14 06:21:56 zhen Exp $
+
+  14 Jan 2004; zhen <zhen@gentoo.org> arch/mips.py, modules/targets.py:
+  adding Kumba's patches for MIPS
 
   16 Dec 2003; Guy Martin <gmsoft@gentoo.org> : arch/hppa.py,modules/targets.py :
   Added hppa specific code.
diff --git a/arch/mips.py b/arch/mips.py
new file mode 100644
index 00000000..c08d977d
--- /dev/null
+++ b/arch/mips.py
@@ -0,0 +1,90 @@
+# Distributed under the GNU General Public License version 2
+# Copyright 2003-2004 Gentoo Technologies, Inc.
+
+import builder,os
+from catalyst_support import *
+
+class generic_mips(builder.generic):
+	"Abstract base class for all mips builders [Big-endian]"
+	def __init__(self,myspec):
+		builder.generic.__init__(self,myspec)
+		self.settings["mainarch"]="mips"
+		self.settings["CHROOT"]="chroot"
+		self.settings["CHOST"]="mips-unknown-linux-gnu"
+
+class generic_mipsel(builder.generic):
+	"Abstract base class for all mipsel builders [Little-endian]"
+	def __init__(self,myspec):
+		builder.generic.__init__(self,myspec)
+		self.settings["mainarch"]="mips"
+		self.settings["CHROOT"]="chroot"
+		self.settings["CHOST"]="mipsel-unknown-linux-gnu"
+
+class arch_mips1(generic_mips):
+	"Builder class for MIPS I [Big-endian]"
+	def __init__(self,myspec):
+		generic_mips.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -mips1 -mabi=32 -fomit-frame-pointer"
+
+class arch_mips2(generic_mips):
+	"Builder class for MIPS II [Big-endian]"
+	def __init__(self,myspec):
+		generic_mips.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -mips2 -mabi=32 -fomit-frame-pointer"
+
+class arch_mips3(generic_mips):
+	"Builder class for MIPS III [Big-endian]"
+	def __init__(self,myspec):
+		generic_mips.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -fomit-frame-pointer"
+
+class arch_mips4(generic_mips):
+	"Builder class for MIPS IV [Big-endian]"
+	def __init__(self,myspec):
+		generic_mips.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -mips4 -mabi=32 -fomit-frame-pointer"
+
+class arch_mipsel1(generic_mipsel):
+	"Builder class for all MIPS I [Little-endian]"
+	def __init__(self,myspec):
+		generic_mipsel.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -mips1 -mabi=32 -fomit-frame-pointer"
+
+class arch_mipsel2(generic_mipsel):
+	"Builder class for all MIPS II [Little-endian]"
+	def __init__(self,myspec):
+		generic_mipsel.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -mips2 -mabi=32 -fomit-frame-pointer"
+
+class arch_mipsel3(generic_mipsel):
+	"Builder class for all MIPS III [Little-endian]"
+	def __init__(self,myspec):
+		generic_mipsel.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -fomit-frame-pointer"
+
+class arch_mipsel4(generic_mipsel):
+	"Builder class for all MIPS IV [Little-endian]"
+	def __init__(self,myspec):
+		generic_mipsel.__init__(self,myspec)
+		self.settings["CFLAGS"]="-O2 -mips4 -mabi=32 -fomit-frame-pointer"
+
+
+
+def register(foo):
+	"Inform main catalyst program of the contents of this plugin."
+	foo.update({ 
+			"mips"		:arch_mips1,
+			"mips1"		:arch_mips1,
+			"mips2"		:arch_mips2,
+			"mips3"		:arch_mips3,
+			"mips4"		:arch_mips4,
+			"mipsel"	:arch_mipsel1,
+			"mipsel1"	:arch_mipsel1,
+			"mipsel2"	:arch_mipsel2,
+			"mipsel3"	:arch_mipsel3,
+			"mipsel4"	:arch_mipsel4,
+			"sgir4k"	:arch_mips3, 
+			"sgir5k"	:arch_mips4,
+			"sgir10kplus"	:arch_mips4,
+			"cobalt"	:arch_mipsel4
+	 })
diff --git a/modules/targets.py b/modules/targets.py
index 4e6434f2..9228e299 100644
--- a/modules/targets.py
+++ b/modules/targets.py
@@ -30,7 +30,8 @@ class generic_stage_target(generic_target):
 				"alpha" : ["alpha"],
 				"sparc" : ["sparc"],
 				"ppc" : ["ppc"],
-				"hppa" : ["hppa"]
+				"hppa" : ["hppa"],
+				"mips" : ["mips"]
 		}
 		
 		machinemap={ 	"i386" : "x86",
@@ -44,7 +45,9 @@ class generic_stage_target(generic_target):
 				"sparc" : "sparc",
 				"ppc" : "ppc",
 				"parisc" : "hppa",
-				"parisc64" : "hppa"
+				"parisc64" : "hppa",
+				"mips" : "mips",
+				"mips64" : "mips"
 		}
 	
 		mymachine=os.uname()[4]