From: Frank Mori Hess <fmhess@speakeasy.net>
Date: Wed, 11 Jul 2007 14:27:43 +0000 (+0000)
Subject: Added support for reading/writing Gi_DMA_Status/Config registers.
X-Git-Tag: r0_7_74~54
X-Git-Url: http://git.tremily.us/?a=commitdiff_plain;h=2f33a0dddedb1f02b332bde696e5adde8a6a1860;p=comedi.git

Added support for reading/writing Gi_DMA_Status/Config registers.
---

diff --git a/comedi/drivers/ni_660x.c b/comedi/drivers/ni_660x.c
index bbcc9860..c6408a92 100644
--- a/comedi/drivers/ni_660x.c
+++ b/comedi/drivers/ni_660x.c
@@ -565,6 +565,30 @@ static NI_660x_Register ni_gpct_to_660x_register(enum ni_gpct_register reg)
 	case NITIO_G3_Second_Gate_Reg:
 		ni_660x_register = G3SecondGateRegister;
 		break;
+	case NITIO_G0_DMA_Config_Reg:
+		ni_660x_register = G0DMAConfigRegister;
+		break;
+	case NITIO_G0_DMA_Status_Reg:
+		ni_660x_register = G0DMAStatusRegister;
+		break;
+	case NITIO_G1_DMA_Config_Reg:
+		ni_660x_register = G1DMAConfigRegister;
+		break;
+	case NITIO_G1_DMA_Status_Reg:
+		ni_660x_register = G1DMAStatusRegister;
+		break;
+	case NITIO_G2_DMA_Config_Reg:
+		ni_660x_register = G2DMAConfigRegister;
+		break;
+	case NITIO_G2_DMA_Status_Reg:
+		ni_660x_register = G2DMAStatusRegister;
+		break;
+	case NITIO_G3_DMA_Config_Reg:
+		ni_660x_register = G3DMAConfigRegister;
+		break;
+	case NITIO_G3_DMA_Status_Reg:
+		ni_660x_register = G3DMAStatusRegister;
+		break;
 	default:
 		rt_printk("%s: unhandled register 0x%x in switch.\n", __FUNCTION__, reg);
 		BUG();
diff --git a/comedi/drivers/ni_mio_common.c b/comedi/drivers/ni_mio_common.c
index 63ec83fd..1723d59c 100644
--- a/comedi/drivers/ni_mio_common.c
+++ b/comedi/drivers/ni_mio_common.c
@@ -3476,6 +3476,12 @@ static void ni_gpct_write_register(struct ni_gpct *counter, unsigned bits, enum
 	case NITIO_G1_Second_Gate_Reg:
 		ni_writew(bits, M_Offset_G1_Second_Gate);
 		break;
+	case NITIO_G0_DMA_Config_Reg:
+		ni_writew(bits, M_Offset_G0_DMA_Config);
+		break;
+	case NITIO_G1_DMA_Config_Reg:
+		ni_writew(bits, M_Offset_G1_DMA_Config);
+		break;
 	case NITIO_G0_ABZ_Reg:
 		ni_writew(bits, M_Offset_G0_MSeries_ABZ);
 		break;
@@ -3491,6 +3497,7 @@ static void ni_gpct_write_register(struct ni_gpct *counter, unsigned bits, enum
 		stc_register = ni_gpct_to_stc_register(reg);
 		devpriv->stc_writel(dev, bits, stc_register);
 		break;
+
 	/* 16 bit registers */
 	case NITIO_G01_Joint_Reset_Reg:
 		BUG_ON(bits & ~gpct_joint_reset_mask);
@@ -3507,6 +3514,14 @@ static unsigned ni_gpct_read_register(struct ni_gpct *counter, enum ni_gpct_regi
 	unsigned stc_register;
 	switch(reg)
 	{
+	/* m-series only registers */
+	case NITIO_G0_DMA_Status_Reg:
+		return ni_readw(M_Offset_G0_DMA_Status);
+		break;
+	case NITIO_G1_DMA_Status_Reg:
+		return ni_readw(M_Offset_G1_DMA_Status);
+		break;
+
 	/* 32 bit registers */
 	case NITIO_G0_HW_Save_Reg:
 	case NITIO_G1_HW_Save_Reg:
@@ -3515,6 +3530,7 @@ static unsigned ni_gpct_read_register(struct ni_gpct *counter, enum ni_gpct_regi
 		stc_register = ni_gpct_to_stc_register(reg);
 		return devpriv->stc_readl(dev, stc_register);
 		break;
+
 	/* 16 bit registers */
 	default:
 		stc_register = ni_gpct_to_stc_register(reg);