}
-struct mite_channel* mite_offset_request_channel(struct mite_struct *mite, struct mite_dma_descriptor_ring *ring,
- unsigned first_channel_to_try)
+struct mite_channel* mite_request_channel_in_range(struct mite_struct *mite, struct mite_dma_descriptor_ring *ring,
+ unsigned min_channel, unsigned max_channel)
{
int i;
unsigned long flags;
// spin lock so mite_release_channel can be called safely from interrupts
comedi_spin_lock_irqsave(&mite->lock, flags);
- for(i = first_channel_to_try; i < mite->num_channels; ++i)
+ for(i = min_channel; i <= max_channel; ++i)
{
if(mite->channel_allocated[i] == 0)
{
#endif
EXPORT_SYMBOL(mite_devices);
EXPORT_SYMBOL(mite_list_devices);
-EXPORT_SYMBOL(mite_offset_request_channel);
+EXPORT_SYMBOL(mite_request_channel_in_range);
EXPORT_SYMBOL(mite_release_channel);
EXPORT_SYMBOL(mite_prep_dma);
EXPORT_SYMBOL(mite_buf_change);
int mite_setup(struct mite_struct *mite);
void mite_unsetup(struct mite_struct *mite);
void mite_list_devices(void);
-struct mite_channel* mite_offset_request_channel(struct mite_struct *mite, struct mite_dma_descriptor_ring *ring,
- unsigned first_channel_to_try);
+struct mite_channel* mite_request_channel_in_range(
+ struct mite_struct *mite, struct mite_dma_descriptor_ring *ring,
+ unsigned min_channel, unsigned max_channel);
static inline struct mite_channel* mite_request_channel(
struct mite_struct *mite, struct mite_dma_descriptor_ring *ring)
{
- return mite_offset_request_channel(mite, ring, 0);
+ return mite_request_channel_in_range(mite, ring, 0, mite->num_channels - 1);
}
void mite_release_channel(struct mite_channel *mite_chan);
comedi_spin_lock_irqsave(&devpriv->soft_reg_copy_lock, flags);
devpriv->ai_ao_select_reg &= ~AI_DMA_Select_Mask;
- /*FIXME this only works for channels 0,1,2. Need to reverse
- engineer proper bits for higher mite channels with m-series */
if(channel >= 0)
{
devpriv->ai_ao_select_reg |= (1 << (channel + AI_DMA_Select_Shift)) & AI_DMA_Select_Mask;
comedi_spin_lock_irqsave(&devpriv->soft_reg_copy_lock, flags);
devpriv->ai_ao_select_reg &= ~AO_DMA_Select_Mask;
- /*FIXME this only works for channels 0,1,2. Need to reverse
- engineer proper bits for higher mite channels with m-series */
if(channel >= 0)
{
devpriv->ai_ao_select_reg |= (1 << (channel + AO_DMA_Select_Shift)) & AO_DMA_Select_Mask;
static int ni_request_ai_mite_channel(comedi_device *dev)
{
unsigned long flags;
+ static const unsigned max_dma_channel = 3;
comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
BUG_ON(devpriv->ai_mite_chan);
- devpriv->ai_mite_chan = mite_request_channel(devpriv->mite, devpriv->ai_mite_ring);
+ devpriv->ai_mite_chan = mite_request_channel_in_range(devpriv->mite, devpriv->ai_mite_ring, 0, max_dma_channel);
if(devpriv->ai_mite_chan == NULL)
{
comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
static int ni_request_ao_mite_channel(comedi_device *dev)
{
unsigned long flags;
+ static const unsigned max_dma_channel = 3;
comedi_spin_lock_irqsave(&devpriv->mite_channel_lock, flags);
BUG_ON(devpriv->ao_mite_chan);
- devpriv->ao_mite_chan = mite_request_channel(devpriv->mite, devpriv->ao_mite_ring);
+ devpriv->ao_mite_chan = mite_request_channel_in_range(devpriv->mite, devpriv->ao_mite_ring, 0, max_dma_channel);
if(devpriv->ao_mite_chan == NULL)
{
comedi_spin_unlock_irqrestore(&devpriv->mite_channel_lock, flags);
#endif // PCIDMA
}
-static void ni_flush_ai_fifo(comedi_device *dev){
+static void ni_clear_ai_fifo(comedi_device *dev){
if(boardtype.reg_type == ni_reg_6143){
// Flush the 6143 data FIFO
ni_writel(0x10, AIFIFO_Control_6143); // Flush fifo
{
ni_writeb(0, M_Offset_Static_AI_Control(0));
ni_writeb(1, M_Offset_Static_AI_Control(0));
+#if 0
+ /* the NI example code does 3 convert pulses for 625x boards,
+ but that appears to be wrong in practice. */
devpriv->stc_writew(dev, AI_CONVERT_Pulse, AI_Command_1_Register);
devpriv->stc_writew(dev, AI_CONVERT_Pulse, AI_Command_1_Register);
devpriv->stc_writew(dev, AI_CONVERT_Pulse, AI_Command_1_Register);
+#endif
}
}
}
AI_STOP_Interrupt_Enable| AI_Error_Interrupt_Enable|
AI_FIFO_Interrupt_Enable,0);
- ni_flush_ai_fifo(dev);
+ ni_clear_ai_fifo(dev);
if(boardtype.reg_type != ni_reg_6143)
ni_writeb(0, Misc_Command);
ni_load_channelgain_list(dev,1,&insn->chanspec);
- ni_flush_ai_fifo(dev);
+ ni_clear_ai_fifo(dev);
signbits=devpriv->ai_offset[0];
if(boardtype.reg_type == ni_reg_611x){
comedi_error(dev, "cannot run command without an irq");
return -EIO;
}
- ni_flush_ai_fifo(dev);
+ ni_clear_ai_fifo(dev);
ni_load_channelgain_list(dev,cmd->chanlist_len,cmd->chanlist);