Fixed burst mode on dma transfers on pxi-6281

diff --git a/comedi/drivers/mite.c b/comedi/drivers/mite.c
index 48091bc0cdd04c13fad5756af30aeb800168223f..267dd4d5f9bfd11bb0bf27603c6d228cbdb612ac 100644 (file)
--- a/comedi/drivers/mite.c
+++ b/comedi/drivers/mite.c
@@ -114,6 +114,7 @@ int mite_setup(struct mite_struct *mite)
        resource_size_t addr;
        int i;
        u32 csigr_bits;
+       unsigned unknown_dma_burst_bits;
 
        if(pci_enable_device(mite->pcidev)){
                printk("error enabling mite\n");
@@ -153,11 +154,29 @@ int mite_setup(struct mite_struct *mite)
        // The 6602 board needs different initalisation, see the
        // _updated_ (nov 2002) reg. Level Manual (filename 370505b.pdf) p. 3.55
        if (mite->pcidev->device == 0x1310 ){
+               unsigned window_size_order;
+
                printk("mite: detected NI6602, using other I/O Window Base Size register\n");
-               writel((mite->daq_phys_addr & 0xffffff00L) | WENAB_6602 , mite->mite_io_addr + MITE_IODWBSR_1);
-               writel(0 , mite->mite_io_addr + MITE_IODWCR_1);
+               window_size_order = 13; // 8 kbyte
+               writel(mite->daq_phys_addr | WENAB | MITE_IODWBSR_1_WSIZE_bits(window_size_order), mite->mite_io_addr + MITE_IODWBSR_1);
+               writel(0 ,mite->mite_io_addr + MITE_IODWCR_1);
+       }else
+       {
+               writel(mite->daq_phys_addr | WENAB, mite->mite_io_addr + MITE_IODWBSR);
        }
-       else writel(mite->daq_phys_addr | WENAB , mite->mite_io_addr + MITE_IODWBSR);
+       /* make sure dma bursts work.  I got this from running a bus analyzer
+       on a pxi-6281 and a pxi-6713.  6713 powered up with register value
+       of 0x61f and bursts worked.  6281 powered up with register value of
+       0x1f and bursts didn't work.  The NI windows driver read the register, then
+       wrote 0x61f to it, so it looked like it was trying to preserve some
+       of the register bits instead of overwriting them all, I am only
+       guessing which ones though.  Later I'll try initializing the register with
+       all ones and all zeros to see if I can determine which bits the
+       windows driver is really changing.
+       */
+       unknown_dma_burst_bits = readl(mite->mite_io_addr + MITE_UNKNOWN_DMA_BURST_REG);
+       unknown_dma_burst_bits |= 0x600;
+       writel(unknown_dma_burst_bits, mite->mite_io_addr + MITE_UNKNOWN_DMA_BURST_REG);
 
        csigr_bits = readl(mite->mite_io_addr + MITE_CSIGR);
        mite->num_channels = mite_csigr_dmac(csigr_bits);

diff --git a/comedi/drivers/mite.h b/comedi/drivers/mite.h
index f50083d9f813950d90867d65a36311ca4d1ca2e4..b7ac55ef38d5dfcf8f16d0c8dde9281d875a24e3 100644 (file)
--- a/comedi/drivers/mite.h
+++ b/comedi/drivers/mite.h
@@ -153,10 +153,12 @@ static inline int CHAN_OFFSET(int channel)
 
 enum mite_registers
 {
+       MITE_UNKNOWN_DMA_BURST_REG = 0x28,
        MITE_IODWBSR = 0xc0, //IO Device Window Base Size Register
-       MITE_CSIGR = 0x460,     //chip signature
-       MITE_IODWBSR_1 = 0xc4, // IO Device Window Base Size Register 1 (used by 6602 boards)
-       MITE_IODWCR_1 = 0xf4
+       MITE_IODWBSR_1 = 0xc4, // IO Device Window Base Size Register 1
+       MITE_IODWCR_1 = 0xf4,
+       MITE_PCI_CONFIG_OFFSET = 0x300,
+       MITE_CSIGR = 0x460      //chip signature
 };
 static inline int MITE_CHOR(int channel)       // channel operation
 {
@@ -230,8 +232,13 @@ static inline int MITE_FCR(int channel)    // fifo count
 enum MITE_IODWBSR_bits
 {
        WENAB = 0x80,   // window enable
-       WENAB_6602 = 0x8c // window enable for 6602 boards
 };
+// sets window size to 2 raised to the power "order"
+static inline unsigned MITE_IODWBSR_1_WSIZE_bits(unsigned order)
+{
+       BUG_ON(order < 1);
+       return (order - 1) & 0x1f;
+}
 
 static inline int mite_csigr_version(u32 csigr_bits)
 {

diff --git a/comedi/drivers/ni_mio_common.c b/comedi/drivers/ni_mio_common.c
index 4fd3608fb27b680694073ec269e1a80982e95d31..f815b8e1cb0b6bcc9f14db76b87f012c140994cf 100644 (file)
--- a/comedi/drivers/ni_mio_common.c
+++ b/comedi/drivers/ni_mio_common.c
@@ -2775,8 +2775,12 @@ static int ni_ao_cmd(comedi_device *dev,comedi_subdevice *s)
                bits |= AO_FIFO_Enable;
        else
                bits |= AO_DMA_PIO_Control;
+#if 0
+       /* F Hess: windows driver does not set AO_Number_Of_DAC_Packages bit for 6281,
+       verified with bus analyzer. */
        if(boardtype.reg_type & ni_reg_m_series_mask)
-               bits |= AO_Number_Of_DAC_Packages/* | AO_Multiple_DACS_Per_Package*/;
+               bits |= AO_Number_Of_DAC_Packages;
+#endif
        devpriv->stc_writew(dev, bits, AO_Personal_Register);
        // enable sending of ao dma requests
        devpriv->stc_writew(dev, AO_AOFREQ_Enable, AO_Start_Select_Register);