replaced all udelay() calls with comedi_udelay() wrapper for RT safety
authorFrank Mori Hess <fmhess@speakeasy.net>
Thu, 27 Mar 2003 21:00:41 +0000 (21:00 +0000)
committerFrank Mori Hess <fmhess@speakeasy.net>
Thu, 27 Mar 2003 21:00:41 +0000 (21:00 +0000)
30 files changed:
comedi/drivers/adl_pci9111.c
comedi/drivers/adl_pci9118.c
comedi/drivers/adv_pci1710.c
comedi/drivers/cb_das16_cs.c
comedi/drivers/cb_pcidas.c
comedi/drivers/cb_pcidas64.c
comedi/drivers/daqboard2000.c
comedi/drivers/das800.c
comedi/drivers/dt2801.c
comedi/drivers/dt2811.c
comedi/drivers/dt2814.c
comedi/drivers/dt2815.c
comedi/drivers/dt282x.c
comedi/drivers/dt3000.c
comedi/drivers/fl512.c
comedi/drivers/gsc_hpdi.c
comedi/drivers/icp_multi.c
comedi/drivers/ni_at_a2150.c
comedi/drivers/ni_labpc.c
comedi/drivers/ni_mio_common.c
comedi/drivers/ni_pcimio.c
comedi/drivers/pcl711.c
comedi/drivers/pcl812.c
comedi/drivers/pcl816.c
comedi/drivers/pcl818.c
comedi/drivers/plx9080.h
comedi/drivers/rtd520.c
comedi/drivers/rti800.c
comedi/drivers/serial2002.c
include/linux/comedi_rt.h

index 31da8561f1256b2574d87e13523ab76fa42929c9..4ab782694cae33aae35aedcc8801386695993425 100644 (file)
@@ -437,7 +437,7 @@ static void pci9111_timer_set ( comedi_device * dev)
                             PCI9111_8254_MODE_2|
                             PCI9111_8254_BINARY_COUNTER);
 
-  udelay(1);
+  comedi_udelay(1);
 
   pci9111_8254_counter_2_set (dev_private->timer_divisor_2);
   pci9111_8254_counter_1_set (dev_private->timer_divisor_1);
index f8d8cad47d02d33e700c0adcdac0ff34fd237a96..f4f1ba9798b3ddc12ed85d73f3d210f2591da8b4 100644 (file)
@@ -344,11 +344,11 @@ static int pci9118_insn_read_ai(comedi_device *dev,comedi_subdevice *s, comedi_i
 
        for (n=0; n<insn->n; n++) {
                outw(0, dev->iobase+PCI9118_SOFTTRG); /* start conversion */
-               udelay(2);
+               comedi_udelay(2);
                timeout=100;
                while (timeout--) {
                        if (inl(dev->iobase+PCI9118_ADSTAT) & AdStatus_ADrdy) goto conv_finish;
-                       udelay(1);
+                       comedi_udelay(1);
                }
 
                comedi_error(dev,"A/D insn timeout");
@@ -1611,7 +1611,7 @@ static int pci9118_ai_cmd(comedi_device *dev,comedi_subdevice *s)
        outl(devpriv->AdControlReg,dev->iobase+PCI9118_ADCNTRL);
        devpriv->AdFunctionReg=AdFunction_PDTrg|AdFunction_PETrg;       // positive triggers, no S&H, no burst, burst stop, no post trigger, no about trigger, trigger stop
        outl(devpriv->AdFunctionReg,dev->iobase+PCI9118_ADFUNC);
-       udelay(1);
+       comedi_udelay(1);
        outl(0,dev->iobase+PCI9118_DELFIFO); // flush FIFO
        inl(dev->iobase+PCI9118_ADSTAT); // flush A/D and INT status register
        inl(dev->iobase+PCI9118_INTSRC);
@@ -1778,7 +1778,7 @@ static int setup_channel_list(comedi_device * dev, comedi_subdevice * s, int n_c
 #endif
 #endif
        outl(0,dev->iobase+PCI9118_SCANMOD);    // close scan queue
-//     udelay(100);                            // important delay, or first sample will be cripled
+//     comedi_udelay(100);                             // important delay, or first sample will be cripled
 
        DPRINTK("adl_pci9118 EDBG: END: setup_channel_list()\n");
        return 1; // we can serve this with scan logic
@@ -1839,7 +1839,7 @@ static void start_pacer(comedi_device * dev, int mode, unsigned int divisor1, un
         outl(0x74, dev->iobase + PCI9118_CNTCTRL);
         outl(0xb4, dev->iobase + PCI9118_CNTCTRL);
 //     outl(0x30, dev->iobase + PCI9118_CNTCTRL);
-        udelay(1);
+        comedi_udelay(1);
   
         if ((mode==1)||(mode==2)||(mode==4)) {
                outl(divisor2 & 0xff, dev->iobase + PCI9118_CNT2);
@@ -1939,7 +1939,7 @@ static int pci9118_reset(comedi_device *dev)
        outl(devpriv->ao_data[0],dev->iobase+PCI9118_DA1);// reset A/D outs to 0V
        outl(devpriv->ao_data[1],dev->iobase+PCI9118_DA2);
        outl(0,dev->iobase+PCI9118_DO); // reset digi outs to L
-       udelay(10);
+       comedi_udelay(10);
        inl(dev->iobase+PCI9118_AD_DATA);
        outl(0,dev->iobase+PCI9118_DELFIFO); // flush FIFO
        outl(0,dev->iobase+PCI9118_INTSRC); // remove INT requests
index 7419058a309ff56a7174c23a63072bddb0b833d6..7c1ba45557b3f8fbc3dd80e21e5bf778d04b16ce 100644 (file)
@@ -323,7 +323,7 @@ static int pci171x_insn_read_ai(comedi_device * dev, comedi_subdevice * s, comed
        for (n=0; n<insn->n; n++) {
                outw(0, dev->iobase+PCI171x_SOFTTRG); /* start conversion */
                DPRINTK("adv_pci1710 B n=%d ST=%4x\n",n,inw(dev->iobase+PCI171x_STATUS));
-               //udelay(1);
+               //comedi_udelay(1);
                DPRINTK("adv_pci1710 C n=%d ST=%4x\n",n,inw(dev->iobase+PCI171x_STATUS));
                timeout=100;
                while (timeout--) {
index 371efab54c85446b98cdf87f48b129275d94a955..4917eb2b611d6b5503ff9642cfe157ce706a2f43 100644 (file)
@@ -483,7 +483,7 @@ static int das16cs_ao_winsn(comedi_device *dev,comedi_subdevice *s,comedi_insn *
 
                //devpriv->status1 |= 0x0009;
                outw(devpriv->status1, dev->iobase + 4);
-               udelay(1);
+               comedi_udelay(1);
 
                status1 = devpriv->status1;
                //if(chan)status1 &= ~0x0008;
@@ -493,17 +493,17 @@ static int das16cs_ao_winsn(comedi_device *dev,comedi_subdevice *s,comedi_insn *
 
                printk("0x%04x\n",status1);
                outw(status1, dev->iobase + 4);
-               udelay(1);
+               comedi_udelay(1);
 
                for(bit=15;bit>=0;bit--){
                        int b = (d>>bit)&1;
 
                        printk("0x%04x\n",status1 | b | 0x0000);
                        outw(status1 | b | 0x0000, dev->iobase + 4);
-                       udelay(1);
+                       comedi_udelay(1);
                        printk("0x%04x\n",status1 | b | 0x0004);
                        outw(status1 | b | 0x0004, dev->iobase + 4);
-                       udelay(1);
+                       comedi_udelay(1);
                }
 
                outw(devpriv->status1, dev->iobase + 4);
index 90e977c4cf1ecd1ad93a42e530c0d4598e8340da..1d5a295ca6b02e865db373f21cd418aed4d551a5 100644 (file)
@@ -1716,7 +1716,7 @@ static void write_calibration_bitstream( comedi_device *dev, unsigned int regist
                        register_bits |= SERIAL_DATA_IN_BIT;
                else
                        register_bits &= ~SERIAL_DATA_IN_BIT;
-               udelay( write_delay );
+               comedi_udelay( write_delay );
                outw( register_bits, devpriv->control_status + CALIBRATION_REG);
        }
 }
@@ -1726,7 +1726,7 @@ static int caldac_8800_write(comedi_device *dev, unsigned int address, uint8_t v
        static const int num_caldac_channels = 8;
        static const int bitstream_length = 11;
        unsigned int bitstream = ((address & 0x7) << 8) | value;
-       static const int caldac_8800_udelay = 1;
+       static const int caldac_8800_comedi_udelay = 1;
 
        if(address >= num_caldac_channels)
        {
@@ -1736,9 +1736,9 @@ static int caldac_8800_write(comedi_device *dev, unsigned int address, uint8_t v
 
        write_calibration_bitstream( dev, 0, bitstream, bitstream_length );
 
-       udelay(caldac_8800_udelay);
+       comedi_udelay(caldac_8800_comedi_udelay);
        outw(SELECT_8800_BIT, devpriv->control_status + CALIBRATION_REG);
-       udelay(caldac_8800_udelay);
+       comedi_udelay(caldac_8800_comedi_udelay);
        outw(0, devpriv->control_status + CALIBRATION_REG);
 
        return 0;
@@ -1749,15 +1749,15 @@ static int trimpot_7376_write(comedi_device *dev, uint8_t value)
        static const int bitstream_length = 7;
        unsigned int bitstream = value & 0x7f;
        unsigned int register_bits;
-       static const int ad7376_udelay = 1;
+       static const int ad7376_comedi_udelay = 1;
 
        register_bits = SELECT_TRIMPOT_BIT;
-       udelay( ad7376_udelay );
+       comedi_udelay( ad7376_comedi_udelay );
        outw( register_bits, devpriv->control_status + CALIBRATION_REG);
 
        write_calibration_bitstream( dev, register_bits, bitstream, bitstream_length );
 
-       udelay(ad7376_udelay);
+       comedi_udelay(ad7376_comedi_udelay);
        outw(0, devpriv->control_status + CALIBRATION_REG);
 
        return 0;
@@ -1772,15 +1772,15 @@ static int trimpot_8402_write(comedi_device *dev, unsigned int channel, uint8_t
        static const int bitstream_length = 10;
        unsigned int bitstream = ( ( channel & 0x1 ) << 8 ) | ( value & 0xff );
        unsigned int register_bits;
-       static const int ad8402_udelay = 1;
+       static const int ad8402_comedi_udelay = 1;
 
        register_bits = SELECT_TRIMPOT_BIT;
-       udelay( ad8402_udelay );
+       comedi_udelay( ad8402_comedi_udelay );
        outw( register_bits, devpriv->control_status + CALIBRATION_REG);
 
        write_calibration_bitstream( dev, register_bits, bitstream, bitstream_length );
 
-       udelay(ad8402_udelay);
+       comedi_udelay(ad8402_comedi_udelay);
        outw(0, devpriv->control_status + CALIBRATION_REG);
 
        return 0;
@@ -1795,7 +1795,7 @@ static int wait_for_nvram_ready( unsigned long s5933_base_addr )
        {
                if( ( inb( s5933_base_addr + AMCC_OP_REG_MCSR_NVCMD ) & MCSR_NV_BUSY ) == 0 )
                        return 0;
-               udelay( 1 );
+               comedi_udelay( 1 );
        }
        return -1;
 }
index 024eb96c95238e6469518b1c7202c4aa50d7acf7..3a2a70f20a7fc18e17d9a3266e496ad8f13f14f2 100644 (file)
@@ -1523,7 +1523,7 @@ static int ai_rinsn(comedi_device *dev,comedi_subdevice *s,comedi_insn *insn,lsa
                                if( pipe_full_bits( bits ) )
                                        break;
                        }
-                       udelay(1);
+                       comedi_udelay(1);
                }
                DEBUG_PRINT(" looped %i times waiting for data\n", i);
                if(i == timeout)
@@ -2663,12 +2663,12 @@ static void ad8402_write( comedi_device *dev, unsigned int channel, unsigned int
        static const int bitstream_length = 10;
        unsigned int bit, register_bits;
        unsigned int bitstream = ( ( channel & 0x3 ) << 8 ) | ( value & 0xff );
-       static const int ad8402_udelay = 1;
+       static const int ad8402_comedi_udelay = 1;
 
        priv(dev)->ad8402_state[ channel ] = value;
 
        register_bits = SELECT_8402_64XX_BIT;
-       udelay( ad8402_udelay );
+       comedi_udelay( ad8402_comedi_udelay );
        writew( register_bits, priv(dev)->main_iobase + CALIBRATION_REG );
 
        for( bit = 1 << ( bitstream_length - 1 ); bit; bit >>= 1 )
@@ -2677,13 +2677,13 @@ static void ad8402_write( comedi_device *dev, unsigned int channel, unsigned int
                        register_bits |= SERIAL_DATA_IN_BIT;
                else
                        register_bits &= ~SERIAL_DATA_IN_BIT;
-               udelay( ad8402_udelay );
+               comedi_udelay( ad8402_comedi_udelay );
                writew( register_bits, priv(dev)->main_iobase + CALIBRATION_REG );
-               udelay( ad8402_udelay );
+               comedi_udelay( ad8402_comedi_udelay );
                writew( register_bits | SERIAL_CLOCK_BIT, priv(dev)->main_iobase + CALIBRATION_REG );
        }
 
-       udelay( ad8402_udelay );
+       comedi_udelay( ad8402_comedi_udelay );
        writew( 0, priv(dev)->main_iobase + CALIBRATION_REG );
 }
 
@@ -2722,15 +2722,15 @@ static uint16_t read_eeprom(comedi_device *dev, uint8_t address)
        const int plx_control_addr = priv(dev)->plx9080_iobase + PLX_CONTROL_REG;
        uint16_t value;
        static const int value_length = 16;
-       static const int eeprom_udelay = 1;
+       static const int eeprom_comedi_udelay = 1;
 
-       udelay(eeprom_udelay);
+       comedi_udelay(eeprom_comedi_udelay);
        priv(dev)->plx_control_bits &= ~CTL_EE_CLK & ~CTL_EE_CS;
        // make sure we don't send anything to the i2c bus on 4020
        priv(dev)->plx_control_bits |= CTL_USERO;
        writel(priv(dev)->plx_control_bits, plx_control_addr);
        // activate serial eeprom
-       udelay(eeprom_udelay);
+       comedi_udelay(eeprom_comedi_udelay);
        priv(dev)->plx_control_bits |= CTL_EE_CS;
        writel(priv(dev)->plx_control_bits, plx_control_addr);
 
@@ -2738,17 +2738,17 @@ static uint16_t read_eeprom(comedi_device *dev, uint8_t address)
        for(bit = 1 << (bitstream_length - 1); bit; bit >>= 1)
        {
                // set bit to be written
-               udelay(eeprom_udelay);
+               comedi_udelay(eeprom_comedi_udelay);
                if(bitstream & bit)
                        priv(dev)->plx_control_bits |= CTL_EE_W;
                else
                        priv(dev)->plx_control_bits &= ~CTL_EE_W;
                writel(priv(dev)->plx_control_bits, plx_control_addr);
                // clock in bit
-               udelay(eeprom_udelay);
+               comedi_udelay(eeprom_comedi_udelay);
                priv(dev)->plx_control_bits |= CTL_EE_CLK;
                writel(priv(dev)->plx_control_bits, plx_control_addr);
-               udelay(eeprom_udelay);
+               comedi_udelay(eeprom_comedi_udelay);
                priv(dev)->plx_control_bits &= ~CTL_EE_CLK;
                writel(priv(dev)->plx_control_bits, plx_control_addr);
        }
@@ -2757,19 +2757,19 @@ static uint16_t read_eeprom(comedi_device *dev, uint8_t address)
        for(bit = 1 << (value_length - 1); bit; bit >>= 1)
        {
                // clock out bit
-               udelay(eeprom_udelay);
+               comedi_udelay(eeprom_comedi_udelay);
                priv(dev)->plx_control_bits |= CTL_EE_CLK;
                writel(priv(dev)->plx_control_bits, plx_control_addr);
-               udelay(eeprom_udelay);
+               comedi_udelay(eeprom_comedi_udelay);
                priv(dev)->plx_control_bits &= ~CTL_EE_CLK;
                writel(priv(dev)->plx_control_bits, plx_control_addr);
-               udelay(eeprom_udelay);
+               comedi_udelay(eeprom_comedi_udelay);
                if(readl(plx_control_addr) & CTL_EE_R)
                        value |= bit;
        }
 
        // deactivate eeprom serial input
-       udelay(eeprom_udelay);
+       comedi_udelay(eeprom_comedi_udelay);
        priv(dev)->plx_control_bits &= ~CTL_EE_CS;
        writel(priv(dev)->plx_control_bits, plx_control_addr);
 
@@ -2930,7 +2930,7 @@ static int caldac_8800_write(comedi_device *dev, unsigned int address, uint8_t v
        static const int bitstream_length = 11;
        unsigned int bitstream = ((address & 0x7) << 8) | value;
        unsigned int bit, register_bits;
-       static const int caldac_8800_udelay = 1;
+       static const int caldac_8800_comedi_udelay = 1;
 
        if(address >= num_caldac_channels)
        {
@@ -2943,16 +2943,16 @@ static int caldac_8800_write(comedi_device *dev, unsigned int address, uint8_t v
                register_bits = 0;
                if(bitstream & bit)
                        register_bits |= SERIAL_DATA_IN_BIT;
-               udelay(caldac_8800_udelay);
+               comedi_udelay(caldac_8800_comedi_udelay);
                writew(register_bits, priv(dev)->main_iobase + CALIBRATION_REG);
                register_bits |= SERIAL_CLOCK_BIT;
-               udelay(caldac_8800_udelay);
+               comedi_udelay(caldac_8800_comedi_udelay);
                writew(register_bits, priv(dev)->main_iobase + CALIBRATION_REG);
         }
 
-       udelay(caldac_8800_udelay);
+       comedi_udelay(caldac_8800_comedi_udelay);
        writew(SELECT_8800_BIT, priv(dev)->main_iobase + CALIBRATION_REG);
-       udelay(caldac_8800_udelay);
+       comedi_udelay(caldac_8800_comedi_udelay);
        writew(0, priv(dev)->main_iobase + CALIBRATION_REG);
 
        return 0;
@@ -3022,8 +3022,8 @@ static int caldac_i2c_write(comedi_device *dev, unsigned int caldac_channel, uns
 }
 
 // Their i2c requires a huge delay on setting clock or data high for some reason
-static const int i2c_high_udelay = 1000;
-static const int i2c_low_udelay = 10;
+static const int i2c_high_comedi_udelay = 1000;
+static const int i2c_low_comedi_udelay = 10;
 
 // set i2c data line high or low
 static void i2c_set_sda(comedi_device *dev, int state)
@@ -3036,12 +3036,12 @@ static void i2c_set_sda(comedi_device *dev, int state)
                // set data line high
                priv(dev)->plx_control_bits &= ~data_bit;
                writel(priv(dev)->plx_control_bits, plx_control_addr);
-               udelay(i2c_high_udelay);
+               comedi_udelay(i2c_high_comedi_udelay);
        }else // set data line low
        {
                priv(dev)->plx_control_bits |= data_bit;
                writel(priv(dev)->plx_control_bits, plx_control_addr);
-               udelay(i2c_low_udelay);
+               comedi_udelay(i2c_low_comedi_udelay);
        }
 }
 
@@ -3056,12 +3056,12 @@ static void i2c_set_scl(comedi_device *dev, int state)
                // set clock line high
                priv(dev)->plx_control_bits &= ~clock_bit;
                writel(priv(dev)->plx_control_bits, plx_control_addr);
-               udelay(i2c_high_udelay);
+               comedi_udelay(i2c_high_comedi_udelay);
        }else // set clock line low
        {
                priv(dev)->plx_control_bits |= clock_bit;
                writel(priv(dev)->plx_control_bits, plx_control_addr);
-               udelay(i2c_low_udelay);
+               comedi_udelay(i2c_low_comedi_udelay);
        }
 }
 
index 133b8bb533cb68b6740a5e63b86b76b0b11b34e6..1cb8e71769da845c1ac93f5b7d980e5f4c0cefc2 100644 (file)
@@ -334,9 +334,9 @@ static void writeAcqScanListEntry(comedi_device *dev, u16 entry)
 {
   daqboard2000_hw *fpga = devpriv->daq;
 
-  udelay(4);
+  comedi_udelay(4);
   fpga->acqScanListFIFO = entry & 0x00ff;
-  udelay(4);
+  comedi_udelay(4);
   fpga->acqScanListFIFO = (entry >> 8) & 0x00ff;
 }
 
@@ -396,16 +396,16 @@ static int daqboard2000_ai_insn_read(comedi_device *dev, comedi_subdevice *s,
     fpga->acqControl = DAQBOARD2000_SeqStartScanList;
     for (timeout = 0 ; timeout < 20 ; timeout++) {
       if (fpga->acqControl & DAQBOARD2000_AcqConfigPipeFull) { break; }
-      //udelay(2);
+      //comedi_udelay(2);
     }
     fpga->acqControl = DAQBOARD2000_AdcPacerEnable;
     for (timeout = 0 ; timeout < 20 ; timeout++) {
       if (fpga->acqControl & DAQBOARD2000_AcqLogicScanning) { break; }
-      //udelay(2);
+      //comedi_udelay(2);
     }
     for (timeout = 0 ; timeout < 20 ; timeout++) {
       if (fpga->acqControl & DAQBOARD2000_AcqResultsFIFOHasValidData) { break;}
-      //udelay(2);
+      //comedi_udelay(2);
     }
     data[i] = fpga->acqResultsFIFO;
     fpga->acqControl = DAQBOARD2000_AdcPacerDisable;
@@ -442,16 +442,16 @@ static int daqboard2000_ao_insn_write(comedi_device *dev, comedi_subdevice *s,
      * OK, since it works OK without enabling the DAC's, let's keep
      * it as simple as possible...
      */
-    //fpga->dacControl = (chan + 2) * 0x0010 | 0x0001; udelay(1000);
+    //fpga->dacControl = (chan + 2) * 0x0010 | 0x0001; comedi_udelay(1000);
     fpga->dacSetting[chan] = data[i];
     for (timeout = 0 ; timeout < 20 ; timeout++) {
       if ((fpga->dacControl & ((chan + 1) * 0x0010)) == 0) { break; }
-      //udelay(2);
+      //comedi_udelay(2);
     }
     devpriv->ao_readback[chan] = data[i];
   /*  
    * Since we never enabled the DAC's, we don't need to disable it...
-   * fpga->dacControl = (chan + 2) * 0x0010 | 0x0000; udelay(1000);
+   * fpga->dacControl = (chan + 2) * 0x0010 | 0x0000; comedi_udelay(1000);
    */
   }
 
@@ -462,29 +462,29 @@ static void daqboard2000_resetLocalBus(comedi_device *dev)
 {
   printk("daqboard2000_resetLocalBus\n");
   writel(DAQBOARD2000_SECRLocalBusHi, devpriv->plx + 0x6c);
-  udelay(10000);
+  comedi_udelay(10000);
   writel(DAQBOARD2000_SECRLocalBusLo, devpriv->plx + 0x6c);
-  udelay(10000);
+  comedi_udelay(10000);
 }
 
 static void daqboard2000_reloadPLX(comedi_device *dev)
 {
   printk("daqboard2000_reloadPLX\n");
   writel(DAQBOARD2000_SECRReloadLo, devpriv->plx + 0x6c);
-  udelay(10000);
+  comedi_udelay(10000);
   writel(DAQBOARD2000_SECRReloadHi, devpriv->plx + 0x6c);
-  udelay(10000);
+  comedi_udelay(10000);
   writel(DAQBOARD2000_SECRReloadLo, devpriv->plx + 0x6c);
-  udelay(10000);
+  comedi_udelay(10000);
 }
 
 static void daqboard2000_pulseProgPin(comedi_device *dev)
 {
   printk("daqboard2000_pulseProgPin 1\n");
   writel(DAQBOARD2000_SECRProgPinHi, devpriv->plx + 0x6c);
-  udelay(10000);
+  comedi_udelay(10000);
   writel(DAQBOARD2000_SECRProgPinLo, devpriv->plx + 0x6c);
-  udelay(10000); /* Not in the original code, but I like symmetry... */
+  comedi_udelay(10000); /* Not in the original code, but I like symmetry... */
 }
 
 static int daqboard2000_pollCPLD(comedi_device *dev, int mask) {
@@ -499,9 +499,9 @@ static int daqboard2000_pollCPLD(comedi_device *dev, int mask) {
       result=1;
       break;
     }
-    udelay(100);
+    comedi_udelay(100);
   }
-  udelay(5);
+  comedi_udelay(5);
   return result;
 }
 
@@ -509,7 +509,7 @@ static int daqboard2000_writeCPLD(comedi_device *dev, int data)
 {
   int result = 0;
 
-  udelay(10);
+  comedi_udelay(10);
   writew(data, devpriv->daq + 0x1000);
   if ((readw(devpriv->daq + 0x1000) & DAQBOARD2000_CPLD_INIT) == 
       DAQBOARD2000_CPLD_INIT) {
@@ -584,17 +584,17 @@ static void daqboard2000_adcDisarm(comedi_device *dev)
   daqboard2000_hw *fpga = devpriv->daq;
 
   /* Disable hardware triggers */  
-  udelay(2);
+  comedi_udelay(2);
   fpga->trigControl = DAQBOARD2000_TrigAnalog | DAQBOARD2000_TrigDisable;
-  udelay(2);
+  comedi_udelay(2);
   fpga->trigControl = DAQBOARD2000_TrigTTL | DAQBOARD2000_TrigDisable; 
 
   /* Stop the scan list FIFO from loading the configuration pipe */
-  udelay(2);
+  comedi_udelay(2);
   fpga->acqControl = DAQBOARD2000_SeqStopScanList;
 
   /* Stop the pacer clock */
-  udelay(2);
+  comedi_udelay(2);
   fpga->acqControl = DAQBOARD2000_AdcPacerDisable; 
    
   /* Stop the input dma (abort channel 1) */
@@ -610,7 +610,7 @@ static void daqboard2000_activateReferenceDacs(comedi_device *dev)
   fpga->refDacs = 0x80 | DAQBOARD2000_PosRefDacSelect;
   for (timeout = 0 ; timeout < 20 ; timeout++) {
     if ((fpga->dacControl & DAQBOARD2000_RefBusy) == 0) { break; }
-    udelay(2);
+    comedi_udelay(2);
   }
 /*  printk("DAQBOARD2000_PosRefDacSelect %d\n", timeout);*/
 
@@ -618,7 +618,7 @@ static void daqboard2000_activateReferenceDacs(comedi_device *dev)
   fpga->refDacs = 0x80 | DAQBOARD2000_NegRefDacSelect;
   for (timeout = 0 ; timeout < 20 ; timeout++) {
     if ((fpga->dacControl & DAQBOARD2000_RefBusy) == 0) { break; }
-    udelay(2);
+    comedi_udelay(2);
   }
 /*  printk("DAQBOARD2000_NegRefDacSelect %d\n", timeout);*/
 }
index 9e9e6ddd35d1b01677f0b28e7c7571f92f1aeb37..ed3475270c02c24194de52e177301fe76f675d82 100644 (file)
@@ -829,7 +829,7 @@ static int das800_ai_rinsn(comedi_device *dev, comedi_subdevice *s, comedi_insn
        range &= 0xf;
        outb(range, dev->iobase + DAS800_GAIN);
 
-       udelay(5);
+       comedi_udelay(5);
 
        for(n = 0; n < insn->n; n++)
        {
index 5e517baf599373fef327fda49223d3f9a6865b15..d7c6829d4ae2b8fccaf52e4a23c0ac1172b5df8c 100644 (file)
@@ -384,7 +384,7 @@ static int dt2801_reset(comedi_device *dev)
        outb_p(DT_C_STOP, dev->iobase+DT2801_CMD);
 
        //dt2801_wait_for_ready(dev);
-       udelay(100);
+       comedi_udelay(100);
        timeout=10000;
        do{
                stat = inb_p(dev->iobase+DT2801_STATUS);
@@ -401,7 +401,7 @@ static int dt2801_reset(comedi_device *dev)
        outb_p(DT_C_RESET, dev->iobase+DT2801_CMD);
        //dt2801_writecmd(dev,DT_C_RESET);
 
-       udelay(100);
+       comedi_udelay(100);
        timeout=10000;
        do{
                stat = inb_p(dev->iobase+DT2801_STATUS);
index 0c6d948faf072d8db3f36a007d10c2d82cc17135..bcbd86ac5832dd4278952b88f31172c2a99def7e 100644 (file)
@@ -318,7 +318,7 @@ static int dt2811_attach(comedi_device * dev, comedi_devconfig * it)
 
 #if 0
        outb(0, dev->iobase + DT2811_ADCSR);
-       udelay(100);
+       comedi_udelay(100);
        i = inb(dev->iobase + DT2811_ADDATLO);
        i = inb(dev->iobase + DT2811_ADDATHI);
 #endif
@@ -333,7 +333,7 @@ static int dt2811_attach(comedi_device * dev, comedi_devconfig * it)
                outb(DT2811_CLRERROR | DT2811_INTENB, dev->iobase + DT2811_ADCSR);
                outb(0, dev->iobase + DT2811_ADGCR);
 
-               udelay(100);
+               comedi_udelay(100);
 
                irq = probe_irq_off(irqs);
                restore_flags(flags);
index 0b6ff7aacbabc4e81c4722ff19997d802730693c..629348f4a6d88c50472d91e1b901ea49cb15a860 100644 (file)
@@ -96,7 +96,7 @@ static int dt2814_ai_insn_read(comedi_device *dev,comedi_subdevice *s,
                for(i=0;i<DT2814_TIMEOUT;i++){
                        status = inb(dev->iobase+DT2814_CSR);
 printk("dt2814: status: %02x\n",status);
-udelay(10);
+comedi_udelay(10);
                        if(status&DT2814_FINISH)
                                break;
                }
@@ -250,7 +250,7 @@ static int dt2814_attach(comedi_device *dev,comedi_devconfig *it)
        dev->board_name = "dt2814";
 
        outb(0,dev->iobase+DT2814_CSR);
-       udelay(100);
+       comedi_udelay(100);
        if(inb(dev->iobase+DT2814_CSR)&DT2814_ERR){
                printk("reset error (fatal)\n");
                return -EIO;
@@ -267,7 +267,7 @@ static int dt2814_attach(comedi_device *dev,comedi_devconfig *it)
        
                outb(0,dev->iobase+DT2814_CSR);
 
-               udelay(100);
+               comedi_udelay(100);
 
                irq=probe_irq_off(irqs);
                restore_flags(flags);
index 254790fd2f984f96e83d03528742e0bc65b70262..72faec621033bf99d64c8c7a65d1da3178fe4e9b 100644 (file)
@@ -224,7 +224,7 @@ static int dt2815_attach(comedi_device * dev, comedi_devconfig * it)
     /* This is incredibly slow (approx 20 ms) */
     unsigned int status;
 
-    udelay(1000);
+    comedi_udelay(1000);
     status = inb(dev->iobase + DT2815_STATUS);
     if (status == 4) {
       unsigned int program;
index cf538324f3e362dbb0cf8381ab36f2cf5292283d..c2e68ad0cff8e8b4725d91b1dcdd333308c4e228 100644 (file)
@@ -354,7 +354,7 @@ typedef struct {
                int _i;                                 \
                for(_i=0;_i<DT2821_TIMEOUT;_i++){       \
                        if(a){_i=0;break;}              \
-                       udelay(5);                      \
+                       comedi_udelay(5);                       \
                }                                       \
                if(_i){b}                               \
        }while(0)
@@ -1220,7 +1220,7 @@ static int dt282x_attach(comedi_device * dev, comedi_devconfig * it)
 
                /* trigger interrupt */
 
-               udelay(100);
+               comedi_udelay(100);
 
                irq = probe_irq_off(irqs);
                restore_flags(flags);
index 04fb37997c16a9e6921727e3d9c604ca66f19e3f..3e4bb7c2c02ef7001e14a2644af372ceeb3e67a7 100644 (file)
@@ -295,7 +295,7 @@ static int dt3k_send_cmd(comedi_device *dev,unsigned int cmd)
                status=readw(dev->iobase+DPR_Command_Mbx);
                if((status&DT3000_COMPLETION_MASK)!=DT3000_NOTPROCESSED)
                        break;
-               udelay(1);
+               comedi_udelay(1);
        }
        if((status&DT3000_COMPLETION_MASK)==DT3000_NOERROR){
                return 0;
index 136c8230ef081ee53fc0458b9e30cbc609916a65..8bf62b4a9e03177583a4480ce358d7d1324432f2 100644 (file)
@@ -81,7 +81,7 @@ static int fl512_ai_insn(comedi_device *dev,
     outb(chan,iobase+2);              /* select chan */
     outb(0,iobase+3);                 /* start conversion */
     /* XXX should test "done" flag instead of delay */
-    udelay(30);                       /* sleep 30 usec */
+    comedi_udelay(30);                       /* sleep 30 usec */
     lo_byte = inb(iobase+2);          /* low 8 byte */
     hi_byte = inb(iobase+3) & 0xf;    /* high 4 bit and mask */
     data[n] = lo_byte + (hi_byte << 8);
index 24a053310e99d5b67e37f06ea5be23d9c7264135..6e9aa8f7070b03d98ab81683938aa8ee952073fc 100644 (file)
@@ -450,7 +450,7 @@ static int init_hpdi( comedi_device *dev )
        uint32_t plx_intcsr_bits;
 
        writel( BOARD_RESET_BIT, priv(dev)->hpdi_iobase + BOARD_CONTROL_REG );
-       udelay( 10 );
+       comedi_udelay( 10 );
 
        writel( almost_empty_bits( 32 ) | almost_full_bits( 32 ),
                priv(dev)->hpdi_iobase + RX_PROG_ALMOST_REG );
index 482b1f2c2baa222ae4552049d3ea4579c3c9af91..06beea7eb9ee24924affea86de85cc8cae81b963 100644 (file)
@@ -264,7 +264,7 @@ static int icp_multi_insn_read_ai(comedi_device * dev, comedi_subdevice * s, com
                printk("icp multi B n=%d ST=%4x\n",n,readw(dev->iobase+ICP_MULTI_ADC_CSR));
 #endif
 
-               udelay(1);
+               comedi_udelay(1);
 
 #ifdef ICP_MULTI_EXTDEBUG
                printk("icp multi C n=%d ST=%4x\n",n,readw(dev->iobase+ICP_MULTI_ADC_CSR));
@@ -281,7 +281,7 @@ static int icp_multi_insn_read_ai(comedi_device * dev, comedi_subdevice * s, com
                                printk("icp multi D n=%d tm=%d ST=%4x\n",n,timeout,readw(dev->iobase+ICP_MULTI_ADC_CSR));
 #endif
 
-                       udelay(1);
+                       comedi_udelay(1);
                }
 
                // If we reach here, a timeout has occurred
@@ -381,7 +381,7 @@ static int icp_multi_insn_write_ao(comedi_device * dev, comedi_subdevice * s, co
                                printk("icp multi A n=%d tm=%d ST=%4x\n",n,timeout,readw(dev->iobase+ICP_MULTI_DAC_CSR));
 #endif
 
-                       udelay(1);
+                       comedi_udelay(1);
                }
 
                // If we reach here, a timeout has occurred
@@ -812,7 +812,7 @@ static int icp_multi_reset(comedi_device *dev)
                        writew(devpriv->DacCmdStatus, dev->iobase+ICP_MULTI_DAC_CSR);
                        
                        // Delay to allow DAC time to recover
-                       udelay(1);
+                       comedi_udelay(1);
                }
        
        // Digital outputs to 0
index 296b1c00b226873584f60bd0bb235387f4dde9b4..59ca720a741ad9c7be34540fe3f9e508e048eb58 100644 (file)
@@ -453,7 +453,7 @@ static int a2150_attach(comedi_device *dev, comedi_devconfig *it)
        {
                if((DCAL_BIT & inw(dev->iobase + STATUS_REG)) == 0)
                        break;
-               udelay(1000);
+               comedi_udelay(1000);
        }
        if(i == timeout)
        {
@@ -786,7 +786,7 @@ static int a2150_ai_rinsn(comedi_device *dev, comedi_subdevice *s, comedi_insn *
                {
                        if(inw(dev->iobase + STATUS_REG) & FNE_BIT)
                                break;
-                       udelay(1);
+                       comedi_udelay(1);
                }
                if(i == timeout)
                {
@@ -803,7 +803,7 @@ static int a2150_ai_rinsn(comedi_device *dev, comedi_subdevice *s, comedi_insn *
                {
                        if(inw(dev->iobase + STATUS_REG) & FNE_BIT)
                                break;
-                       udelay(1);
+                       comedi_udelay(1);
                }
                if(i == timeout)
                {
index 10037fbdd34a9eb31c46d0646a502353efb7b797..eb3678cf3cdb1ad38f1a881e2711ca81ea8df38b 100644 (file)
@@ -1245,7 +1245,7 @@ static int labpc_ai_cmd(comedi_device *dev, comedi_subdevice *s)
                devpriv->command1_bits |= ADC_SCAN_EN_BIT;
                /* need a brief delay before enabling scan, or scan list will get screwed when you switch
                 * between scan up to scan down mode - dunno why */
-               udelay(1);
+               comedi_udelay(1);
                thisboard->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
        }
 
@@ -1660,7 +1660,7 @@ static int labpc_ai_rinsn(comedi_device *dev, comedi_subdevice *s, comedi_insn *
                {
                        if(thisboard->read_byte(dev->iobase + STATUS1_REG) & DATA_AVAIL_BIT)
                                break;
-                       udelay( 1 );
+                       comedi_udelay( 1 );
                }
                if(i == timeout)
                {
@@ -2017,11 +2017,11 @@ static void labpc_serial_out(comedi_device *dev, unsigned int value, unsigned in
                        devpriv->command5_bits |= SDATA_BIT;
                else
                        devpriv->command5_bits &= ~SDATA_BIT;
-               udelay(1);
+               comedi_udelay(1);
                thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
                // set clock to load bit
                devpriv->command5_bits |= SCLOCK_BIT;
-               udelay(1);
+               comedi_udelay(1);
                thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
        }
 }
@@ -2037,14 +2037,14 @@ static unsigned int labpc_serial_in(comedi_device *dev)
        {
                // set serial clock
                devpriv->command5_bits |= SCLOCK_BIT;
-               udelay(1);
+               comedi_udelay(1);
                thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
                // clear clock bit
                devpriv->command5_bits &= ~SCLOCK_BIT;
-               udelay(1);
+               comedi_udelay(1);
                thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
                // read bits most significant bit first
-               udelay(1);
+               comedi_udelay(1);
                devpriv->status2_bits = thisboard->read_byte(dev->iobase + STATUS2_REG);
                if(devpriv->status2_bits & EEPROM_OUT_BIT)
                {
@@ -2063,10 +2063,10 @@ static unsigned int labpc_eeprom_read(comedi_device *dev, unsigned int address)
 
        // enable read/write to eeprom
        devpriv->command5_bits &= ~EEPROM_EN_BIT;
-       udelay(1);
+       comedi_udelay(1);
        thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
        devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
-       udelay(1);
+       comedi_udelay(1);
        thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
 
        // send read instruction
@@ -2078,7 +2078,7 @@ static unsigned int labpc_eeprom_read(comedi_device *dev, unsigned int address)
 
        // disable read/write to eeprom
        devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
-       udelay(1);
+       comedi_udelay(1);
        thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
 
        return value;
@@ -2110,22 +2110,22 @@ static unsigned int labpc_eeprom_write(comedi_device *dev, unsigned int address,
 
        // enable read/write to eeprom
        devpriv->command5_bits &= ~EEPROM_EN_BIT;
-       udelay(1);
+       comedi_udelay(1);
        thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
        devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
-       udelay(1);
+       comedi_udelay(1);
        thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
 
        // send write_enable instruction
        labpc_serial_out(dev, write_enable_instruction, write_length);
        devpriv->command5_bits &= ~EEPROM_EN_BIT;
-       udelay(1);
+       comedi_udelay(1);
        thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
 
 
        // send write instruction
        devpriv->command5_bits |= EEPROM_EN_BIT;
-       udelay(1);
+       comedi_udelay(1);
        thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
        labpc_serial_out(dev, write_instruction, write_length);
        // send 8 bit address to write to
@@ -2133,12 +2133,12 @@ static unsigned int labpc_eeprom_write(comedi_device *dev, unsigned int address,
        // write value
        labpc_serial_out(dev, value, write_length);
        devpriv->command5_bits &= ~EEPROM_EN_BIT;
-       udelay(1);
+       comedi_udelay(1);
        thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
 
        // disable read/write to eeprom
        devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
-       udelay(1);
+       comedi_udelay(1);
        thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
 
        return 0;
@@ -2152,10 +2152,10 @@ static unsigned int labpc_eeprom_read_status(comedi_device *dev)
 
        // enable read/write to eeprom
        devpriv->command5_bits &= ~EEPROM_EN_BIT;
-       udelay(1);
+       comedi_udelay(1);
        thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
        devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
-       udelay(1);
+       comedi_udelay(1);
        thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
 
        // send read status instruction
@@ -2165,7 +2165,7 @@ static unsigned int labpc_eeprom_read_status(comedi_device *dev)
 
        // disable read/write to eeprom
        devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
-       udelay(1);
+       comedi_udelay(1);
        thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
 
        return value;
@@ -2179,7 +2179,7 @@ static void __write_caldac(comedi_device *dev, unsigned int channel, unsigned in
 
        // clear caldac load bit and make sure we don't write to eeprom
        devpriv->command5_bits &= ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
-       udelay(1);
+       comedi_udelay(1);
        thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
 
        /* write 4 bit channel, LSB first (NI appears to have gotten confused here
@@ -2196,10 +2196,10 @@ static void __write_caldac(comedi_device *dev, unsigned int channel, unsigned in
 
        // set and clear caldac bit to load caldac value
        devpriv->command5_bits |= CALDAC_LOAD_BIT;
-       udelay(1);
+       comedi_udelay(1);
        thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
        devpriv->command5_bits &= ~CALDAC_LOAD_BIT;
-       udelay(1);
+       comedi_udelay(1);
        thisboard->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
 }
 
index 2bf0e2cdc2974565f6e02e05e3172dc1ea96afab..1116a712e007d382bda4ce7dbb131776bb7e54a9 100644 (file)
@@ -893,7 +893,7 @@ static int ni_ai_drain_dma(comedi_device *dev )
                if( win_in( AI_Status_1_Register ) & AI_FIFO_Empty_St &&
                        mite_bytes_in_transit( mite, AI_DMA_CHAN ) == 0 )
                        break;
-               udelay( 1 );
+               comedi_udelay( 1 );
        }
        if( i == timeout )
        {
@@ -1154,7 +1154,7 @@ static int ni_ai_insn_read(comedi_device *dev,comedi_subdevice *s,comedi_insn *i
        if(boardtype.reg_611x){
                for(n=0; n < num_adc_stages_611x; n++){
                        win_out(AI_CONVERT_Pulse, AI_Command_1_Register);
-                       udelay(1);
+                       comedi_udelay(1);
                }
                for(n=0; n<insn->n; n++){
                        win_out(AI_CONVERT_Pulse, AI_Command_1_Register);
@@ -1313,7 +1313,7 @@ static void ni_load_channelgain_list(comedi_device *dev,unsigned int n_chan,
                                win_out(1,ADC_FIFO_Clear);
                                return;
                        }
-                       udelay(1);
+                       comedi_udelay(1);
                }
                rt_printk("ni_mio_common: timeout loading channel/gain list\n");
        }
@@ -2053,7 +2053,7 @@ static int ni_ao_inttrig(comedi_device *dev,comedi_subdevice *s,
        win_out(devpriv->ao_mode3,AO_Mode_3_Register);
 
        /* wait for DACs to be loaded */
-       udelay(100);
+       comedi_udelay(100);
 
        win_out(devpriv->ao_cmd1|AO_UI_Arm|AO_UC_Arm|AO_BC_Arm|AO_DAC1_Update_Mode|AO_DAC0_Update_Mode,
                AO_Command_1_Register);
@@ -2720,12 +2720,12 @@ static void ni_write_caldac(comedi_device *dev,int addr,int val)
 
        for(bit=1<<(bits-1);bit;bit>>=1){
                ni_writeb(((bit&bitstring)?0x02:0),Serial_Command);
-               udelay(1);
+               comedi_udelay(1);
                ni_writeb(1|((bit&bitstring)?0x02:0),Serial_Command);
-               udelay(1);
+               comedi_udelay(1);
        }
        ni_writeb(loadbit,Serial_Command);
-       udelay(1);
+       comedi_udelay(1);
        ni_writeb(0,Serial_Command);
 }
 
index bdcb7c5779e32374dfce6849f7dc24ad348b7a2a..293dee19702c043bb833323d12e3801c88928eaf 100644 (file)
@@ -85,7 +85,7 @@ Bugs:
 
        need to slow down DAC loading.  I don't trust NI's claim that
        two writes to the PCI bus slows IO enough.  I would prefer to
-       use udelay().  Timing specs: (clock)
+       use comedi_udelay().  Timing specs: (clock)
                AD8522          30ns
                DAC8043         120ns
                DAC8800         60ns
index 41943c9d9049df7abff2b1761f301e3974639d4e..a67a23511b3bcf17a1ca5a59203e0f14698ee300 100644 (file)
@@ -258,7 +258,7 @@ static int pcl711_ai_insn(comedi_device *dev,comedi_subdevice *s,
                        hi = inb(dev->iobase + PCL711_AD_HI);
                        if (!(hi & PCL711_DRDY))
                                goto ok;
-                       udelay(1);
+                       comedi_udelay(1);
                }
                rt_printk("comedi%d: pcl711: A/D timeout\n", dev->minor);
                return -ETIME;
index 570b7c44edc8513b07e304bfda8ee8fd58490c38..1afcc1657bdbd6a17af4b644fca05b6b9389ca6a 100644 (file)
@@ -430,13 +430,13 @@ static int pcl812_ai_insn_read(comedi_device *dev,comedi_subdevice *s,
        setup_range_channel(dev, s, insn->chanspec, 1); // select channel and renge
        for(n=0;n<insn->n;n++){
                outb(255, dev->iobase + PCL812_SOFTTRIG);       /* start conversion */
-               udelay(5);
+               comedi_udelay(5);
                timeout = 50;   /* wait max 50us, it must finish under 33us */
                while (timeout--) {
                        hi = inb(dev->iobase + PCL812_AD_HI);
                        if (!(hi & PCL812_DRDY))
                                goto conv_finish;
-                       udelay(1);
+                       comedi_udelay(1);
                }
                rt_printk("comedi%d: pcl812: (%s at 0x%x) A/D insn read timeout\n", dev->minor, dev->board_name, dev->iobase);
                outb(devpriv->mode_reg_int|0, dev->iobase + PCL812_MODE);
@@ -462,12 +462,12 @@ static int acl8216_ai_insn_read(comedi_device *dev,comedi_subdevice *s,
        setup_range_channel(dev, s, insn->chanspec, 1); // select channel and renge
        for(n=0;n<insn->n;n++){
                outb(255, dev->iobase + PCL812_SOFTTRIG);       /* start conversion */
-               udelay(5);
+               comedi_udelay(5);
                timeout = 50;   /* wait max 50us, it must finish under 33us */
                while (timeout--) {
                        if (!(inb(dev->iobase + ACL8216_STATUS) & ACL8216_DRDY))
                                goto conv_finish;
-                       udelay(1);
+                       comedi_udelay(1);
                }
                rt_printk("comedi%d: pcl812: (%s at 0x%x) A/D insn read timeout\n", dev->minor, dev->board_name, dev->iobase);
                outb(0, dev->iobase + PCL812_MODE);
@@ -864,7 +864,7 @@ static void interrupt_pcl812_ai_int(int irq, void *d, struct pt_regs *regs)
                        if (!(inb(dev->iobase + ACL8216_STATUS) & ACL8216_DRDY)) {
                            err=0; break;
                        }
-                       udelay(1);
+                       comedi_udelay(1);
                }
        } else {
                mask=0x0fff;
@@ -872,7 +872,7 @@ static void interrupt_pcl812_ai_int(int irq, void *d, struct pt_regs *regs)
                        if (!(inb(dev->iobase + PCL812_AD_HI) & PCL812_DRDY)) {
                            err=0; break;
                        }
-                       udelay(1);
+                       comedi_udelay(1);
                }
        }
        
@@ -1055,7 +1055,7 @@ static void setup_range_channel(comedi_device * dev, comedi_subdevice * s,
        outb(gain_reg, dev->iobase + PCL812_GAIN); /* select gain */
 
         if (wait) {
-               udelay(devpriv->max_812_ai_mode0_rangewait); // XXX this depends on selected range and can be very long for some high gain ranges!
+               comedi_udelay(devpriv->max_812_ai_mode0_rangewait); // XXX this depends on selected range and can be very long for some high gain ranges!
         }
 }
 
@@ -1070,7 +1070,7 @@ static void start_pacer(comedi_device * dev, int mode, unsigned int divisor1, un
 #endif
         outb(0xb4, dev->iobase + PCL812_CTRCTL);
         outb(0x74, dev->iobase + PCL812_CTRCTL);
-        udelay(1);
+        comedi_udelay(1);
   
         if (mode==1) {
                outb(divisor2 & 0xff, dev->iobase + PCL812_CTR2);
@@ -1155,10 +1155,10 @@ static void pcl812_reset(comedi_device * dev)
        case boardPCL813:
        case boardISO813:
        case boardACL8113:
-               udelay(5);
+               comedi_udelay(5);
                break;
        }
-       udelay(5);
+       comedi_udelay(5);
 #ifdef PCL812_EXTDEBUG
        rt_printk("pcl812 EDBG: END: pcl812_reset(...)\n");
 #endif
index 5a7d83f5123f368aae86b4568aec7d5ee516ebc4..7e797267353c82048947f6da178e3ac6c0131880 100644 (file)
@@ -253,7 +253,7 @@ static int pcl816_ai_insn_read(comedi_device *dev, comedi_subdevice *s,
                                outb (0, dev->iobase + PCL816_CLRINT);  /* clear INT (conversion end) flag */
                                break;
                        }
-                       udelay (1);
+                       comedi_udelay (1);
                }
                // Return timeout error
                if(!timeout) {
@@ -283,7 +283,7 @@ interrupt_pcl816_ai_mode13_int (int irq, void *d, struct pt_regs *regs)
   while (timeout--) {
          if (!(inb (dev->iobase + PCL816_STATUS) & PCL816_STATUS_DRDY_MASK)) 
                break;
-      udelay (1);
+      comedi_udelay (1);
   }
   if(!timeout) {                       // timeout, bail error
        outb (0, dev->iobase + PCL816_CLRINT);  /* clear INT request */
@@ -624,7 +624,7 @@ static int pcl816_ai_cmd(comedi_device *dev,comedi_subdevice *s)
 
        if (!check_and_setup_channel_list (dev, s, cmd->chanlist, cmd->chanlist_len))
            return -EINVAL;
-       udelay (1);
+       comedi_udelay (1);
 
                
     devpriv->ai_act_scan=0;
@@ -753,7 +753,7 @@ pcl816_ai_cancel (comedi_device * dev, comedi_subdevice * s)
        case INT_TYPE_AI1_INT:
        case INT_TYPE_AI3_INT:
          outb (inb (dev->iobase + PCL816_CONTROL) & 0x73, dev->iobase + PCL816_CONTROL);       /* Stop A/D */
-         udelay (1);
+         comedi_udelay (1);
          outb (0, dev->iobase + PCL816_CONTROL);       /* Stop A/D */
          outb (0xb0, dev->iobase + PCL816_CTRCTL);     /* Stop pacer */
          outb (0x70, dev->iobase + PCL816_CTRCTL);
@@ -782,17 +782,17 @@ pcl816_ai_cancel (comedi_device * dev, comedi_subdevice * s)
 static int pcl816_check (int iobase)
 {
   outb (0x00, iobase + PCL816_MUX);
-  udelay (1);
+  comedi_udelay (1);
   if (inb (iobase + PCL816_MUX) != 0x00)
     return 1;                  //there isn't card
   outb (0x55, iobase + PCL816_MUX);
-  udelay (1);
+  comedi_udelay (1);
   if (inb (iobase + PCL816_MUX) != 0x55)
     return 1;                  //there isn't card
   outb (0x00, iobase + PCL816_MUX);
-  udelay (1);
+  comedi_udelay (1);
   outb (0x18, iobase + PCL816_CONTROL);
-  udelay (1);
+  comedi_udelay (1);
   if (inb (iobase + PCL816_CONTROL) != 0x18)
     return 1;                  //there isn't card
   return 0;                    // ok, card exist
@@ -807,10 +807,10 @@ pcl816_reset (comedi_device * dev)
 {
 //  outb (0, dev->iobase + PCL818_DA_LO);      // DAC=0V
 //  outb (0, dev->iobase + PCL818_DA_HI);
-//  udelay (1);
+//  comedi_udelay (1);
 //  outb (0, dev->iobase + PCL818_DO_HI);      // DO=$0000
 //  outb (0, dev->iobase + PCL818_DO_LO);
-//  udelay (1);
+//  comedi_udelay (1);
   outb (0, dev->iobase + PCL816_CONTROL);
   outb (0, dev->iobase + PCL816_MUX);
   outb (0, dev->iobase + PCL816_CLRINT);
@@ -832,10 +832,10 @@ start_pacer (comedi_device * dev, int mode, unsigned int divisor1,
        outb (0x32, dev->iobase + PCL816_CTRCTL);
        outb (0xff, dev->iobase + PCL816_CTR0);
        outb (0x00, dev->iobase + PCL816_CTR0);
-       udelay (1);
+       comedi_udelay (1);
     outb(0xb4, dev->iobase + PCL816_CTRCTL);   // set counter 2 as mode 3
     outb(0x74, dev->iobase + PCL816_CTRCTL);   // set counter 1 as mode 3
-    udelay(1);
+    comedi_udelay(1);
 
        if (mode == 1) {
            DPRINTK("mode %d, divisor1 %d, divisor2 %d\n", mode, divisor1, divisor2);
@@ -912,7 +912,7 @@ check_and_setup_channel_list (comedi_device * dev, comedi_subdevice * s, unsigne
          outb (CR_RANGE(chanlist[0]), dev->iobase + PCL816_RANGE);     /* select gain */
   }
 
-  udelay (1);
+  comedi_udelay (1);
 
   outb (devpriv->ai_act_chanlist[0] | (devpriv->ai_act_chanlist[seglen - 1] << 4),
        dev->iobase + PCL816_MUX);      /* select channel interval to scan */
index 298965cd2d10b259fd263dd1a2938c3d06d99d53..4d5e19e1bc619bcd18bda09fd2667956a32fd94c 100644 (file)
@@ -391,7 +391,7 @@ static int pcl818_ai_insn_read(comedi_device *dev, comedi_subdevice *s,
                while (timeout--) {
                        if (inb(dev->iobase + PCL818_STATUS) & 0x10)
                                goto conv_finish;
-                       udelay(1);
+                       comedi_udelay(1);
                }
                comedi_error(dev,"A/D insn timeout");
                /* clear INT (conversion end) flag */
@@ -494,7 +494,7 @@ static void interrupt_pcl818_ai_mode13_int(int irq, void *d, struct pt_regs *reg
 
        while (timeout--) {
                if (inb(dev->iobase + PCL818_STATUS) & 0x10) goto conv_finish;
-               udelay(1);
+               comedi_udelay(1);
         }
         outb(0,dev->iobase+PCL818_STATUS); /* clear INT request */
         comedi_error(dev,"A/D mode1/3 IRQ without DRDY!");
@@ -880,7 +880,7 @@ static int pcl818_ai_mode13(int mode, comedi_device * dev, comedi_subdevice * s,
        start_pacer(dev, -1, 0, 0); // stop pacer
 
         if (!check_and_setup_channel_list(dev, s, it)) return -EINVAL;
-       udelay(1);
+       comedi_udelay(1);
 
         devpriv->int13_act_scan=it->n;
         devpriv->int13_act_chan=0;
@@ -1049,7 +1049,7 @@ static void start_pacer(comedi_device * dev, int mode, unsigned int divisor1, un
         outb(0xb4, dev->iobase + PCL818_CTRCTL);
         outb(0x74, dev->iobase + PCL818_CTRCTL);
        outb(0x30, dev->iobase + PCL818_CTRCTL);
-        udelay(1);
+        comedi_udelay(1);
   
         if (mode==1) {
                outb(divisor2 & 0xff, dev->iobase + PCL818_CTR2);
@@ -1122,7 +1122,7 @@ static int check_and_setup_channel_list(comedi_device * dev, comedi_subdevice *
                outb(CR_RANGE(it->chanlist[i]), dev->iobase+PCL818_RANGE); /* select gain */
        }
 
-       udelay(1);
+       comedi_udelay(1);
 
        /* select channel interval to sca n*/
        outb(devpriv->act_chanlist[0] | (devpriv->act_chanlist[seglen-1] << 4),
@@ -1169,7 +1169,7 @@ static int pcl818_ai_cancel(comedi_device * dev, comedi_subdevice * s)
                case INT_TYPE_AO3_INT:
 #endif
                        outb(inb(dev->iobase+PCL818_CONTROL)& 0x73, dev->iobase+PCL818_CONTROL); /* Stop A/D */
-                       udelay(1);
+                       comedi_udelay(1);
                        outb(0, dev->iobase+PCL818_CONTROL); /* Stop A/D */
                        outb(0xb4, dev->iobase + PCL818_CTRCTL);/* Stop pacer */
                        outb(0x74, dev->iobase + PCL818_CTRCTL);
@@ -1202,15 +1202,15 @@ static int pcl818_ai_cancel(comedi_device * dev, comedi_subdevice * s)
 static int pcl818_check(int iobase) 
 {
         outb(0x00, iobase + PCL818_MUX);
-        udelay(1); 
+        comedi_udelay(1); 
         if (inb(iobase + PCL818_MUX)!=0x00) return 1; //there isn't card
         outb(0x55, iobase + PCL818_MUX);
-        udelay(1); 
+        comedi_udelay(1); 
         if (inb(iobase + PCL818_MUX)!=0x55) return 1; //there isn't card
         outb(0x00, iobase + PCL818_MUX);
-        udelay(1); 
+        comedi_udelay(1); 
         outb(0x18, iobase + PCL818_CONTROL); 
-        udelay(1); 
+        comedi_udelay(1); 
         if (inb(iobase + PCL818_CONTROL)!=0x18) return 1; //there isn't card
         return 0; // ok, card exist
 }
@@ -1228,10 +1228,10 @@ static void pcl818_reset(comedi_device * dev)
         }
         outb(0, dev->iobase + PCL818_DA_LO); // DAC=0V
         outb(0, dev->iobase + PCL818_DA_HI);
-        udelay(1);
+        comedi_udelay(1);
         outb(0, dev->iobase + PCL818_DO_HI); // DO=$0000
         outb(0, dev->iobase + PCL818_DO_LO);
-        udelay(1);
+        comedi_udelay(1);
         outb(0, dev->iobase + PCL818_CONTROL);
         outb(0, dev->iobase + PCL818_CNTENABLE);
         outb(0, dev->iobase + PCL818_MUX);
index fc163b4531aca24afbd66abe929bad1cb2a7d323..447117cc0002495a22d50af1ba1ca70eaf60a1a4 100644 (file)
@@ -379,7 +379,7 @@ static inline int plx9080_abort_dma( unsigned long iobase, unsigned int channel
        for( i = 0; ( dma_status & PLX_DMA_DONE_BIT ) && i < timeout; i++ )
        {
                dma_status = readb( dma_cs_addr );
-               udelay( 1 );
+               comedi_udelay( 1 );
        }
        if( i == timeout )
        {
@@ -388,14 +388,14 @@ static inline int plx9080_abort_dma( unsigned long iobase, unsigned int channel
        }
        // disable channel
        writeb( 0, dma_cs_addr );
-       udelay( 1 );
+       comedi_udelay( 1 );
        // abort channel
        writeb( PLX_DMA_ABORT_BIT, dma_cs_addr );
        // wait for dma done bit
        dma_status = readb( dma_cs_addr );
        for( i = 0; ( dma_status & PLX_DMA_DONE_BIT ) == 0 && i < timeout; i++ )
        {
-               udelay( 1 );
+               comedi_udelay( 1 );
                dma_status = readb( dma_cs_addr );
        }
        if( i == timeout )
index d91c837085eabc0a09d51aae8ee2dd1c8dfd24b9..56b0352fc45a5c488ef1e2110c01c1e432acc08e 100644 (file)
@@ -135,7 +135,7 @@ Configuration options:
 #define RTD_DMA_TIMEOUT        33000           /* 1 msec */
 #else
 /* by delaying, power and electrical noise are reduced somewhat */
-#define WAIT_QUIETLY   udelay (1)
+#define WAIT_QUIETLY   comedi_udelay (1)
 #define RTD_ADC_TIMEOUT        2000            /* in usec */
 #define RTD_DAC_TIMEOUT        2000            /* in usec */
 #define RTD_DMA_TIMEOUT        1000            /* in usec */
@@ -995,7 +995,7 @@ static int rtd_attach (
                                        /* initialize board, per RTD spec */
                                        /* also, initialize shadow registers */
     RtdResetBoard (dev);
-    udelay (100);                      /* needed? */
+    comedi_udelay (100);                       /* needed? */
     RtdInterruptMask (dev,0);          /* and sets shadow */
     RtdInterruptClearMask (dev,~0);    /* and sets shadow */
     RtdInterruptClear(dev);            /* clears bits set by mask */
@@ -1392,7 +1392,7 @@ void abort_dma (
 
     /* disable channel (required) */
     writeb(0, dma_cs_addr);
-    udelay(1);                         /* needed?? */
+    comedi_udelay(1);                          /* needed?? */
     /* set abort bit for channel */
     writeb(PLX_DMA_ABORT_BIT, dma_cs_addr);
 
index c102fed86d3bb1c8fff5bec499c3842b92c7dac1..e38a3f4c485f11971b1940674c16e5bd71cbe7ae 100644 (file)
@@ -197,7 +197,7 @@ static int rti800_ai_insn_read(comedi_device *dev,comedi_subdevice *s,
                                return -EIO;
                        }
                        if (status & RTI800_DONE)break;
-                       //udelay(8);
+                       //comedi_udelay(8);
                }
                if(t == 0){
                        rt_printk("rti800: timeout\n");
index b6933693b15b314ae00c154a8bf6732cd4070c6a..f70eb62a1ae6a6786bd31fbb075a191b153589b4 100644 (file)
@@ -154,7 +154,7 @@ static int tty_read(struct file *f, int timeout)
        if (count == 1) {       result = ch; }
        break;
       }
-      udelay(100);
+      comedi_udelay(100);
     }
     set_fs(oldfs);
   }
index e694f89a3a31823fdf7f6924c61c1361fc9586c8..42140c5add3bbb58b3111ac392aaf932a27b6271 100644 (file)
 #include <linux/slab.h>
 #include <linux/errno.h>
 #include <linux/spinlock.h>
+#include <linux/delay.h>
 
 #ifdef CONFIG_COMEDI_RT
 
 #ifdef CONFIG_COMEDI_RTAI
 #include <rtai.h>
+#include <rtai_sched.h>
 #endif
 #ifdef CONFIG_COMEDI_RTL
 #include <rtl_core.h>
+#include <time.h>
 //#ifdef RTLINUX_VERSION_CODE
 #include <rtl_sync.h>
 //#endif
@@ -124,4 +127,17 @@ static inline void comedi_spin_unlock_irqrestore(spinlock_t *lock_ptr, unsigned
 
 }
 
+/* define a RT safe udelay */
+static inline void comedi_udelay( unsigned int usec )
+{
+#if defined(CONFIG_COMEDI_RTAI)
+       static const int nanosec_per_usec = 1000;
+       rt_busy_sleep( usec * nanosec_per_usec );
+#elif defined(CONFIG_COMEDI_RTL)
+       usleep( usec );
+#else
+       udelay( usec );
+#endif
+}
+
 #endif