/* analog input subdevice */
s=dev->subdevices+0;
- if(boardtype.n_adchan){
- dev->read_subdev=s;
- s->type=COMEDI_SUBD_AI;
- s->subdev_flags=SDF_READABLE|SDF_RT|SDF_GROUND|SDF_COMMON|SDF_DIFF|SDF_OTHER;
- s->subdev_flags|=SDF_DITHER;
- s->n_chan=boardtype.n_adchan;
- s->len_chanlist=512; /* XXX is this the same for PCI-MIO ? */
- s->maxdata=(1<<boardtype.adbits)-1;
- s->range_table=ni_range_lkup[boardtype.gainlkup];
- s->insn_read=ni_ai_insn_read;
- s->do_cmdtest=ni_ai_cmdtest;
- s->do_cmd=ni_ai_cmd;
- s->cancel=ni_ai_reset;
- }else{
- s->type=COMEDI_SUBD_UNUSED;
- }
+ dev->read_subdev=s;
+ s->type=COMEDI_SUBD_AI;
+ s->subdev_flags=SDF_READABLE|SDF_RT|SDF_GROUND|SDF_COMMON|SDF_DIFF|SDF_OTHER;
+ s->subdev_flags|=SDF_DITHER;
+ s->n_chan=boardtype.n_adchan;
+ s->len_chanlist=512; /* XXX is this the same for PCI-MIO ? */
+ s->maxdata=(1<<boardtype.adbits)-1;
+ s->range_table=ni_range_lkup[boardtype.gainlkup];
+ s->insn_read=ni_ai_insn_read;
+ s->do_cmdtest=ni_ai_cmdtest;
+ s->do_cmd=ni_ai_cmd;
+ s->cancel=ni_ai_reset;
/* analog output subdevice */
s->insn_write=ni_ao_insn_write;
s->do_cmd=ni_ao_cmd;
s->do_cmdtest=ni_ao_cmdtest;
- s->len_chanlist = boardtype.n_aochan;
+ s->len_chanlist = 2;
}else{
s->type=COMEDI_SUBD_UNUSED;
}
*/
int GPCTR_G_Watch(comedi_device *dev, int chan) {
int save1,save2;
+ int temp;
devpriv->gpctr_command[chan] &= ~G_Save_Trace;
win_out( devpriv->gpctr_command[chan],G_Command_Register(chan));
if (save1 != save2) {
save1 = GPCTR_G_Read(dev,chan);
}
+
+ //TIM 4/26/01 debugginh
+ temp = win_in(Joint_Status_2_Register);
+ printk("JSR2 = 0x%04x\n",temp);
+
+
+
return save1;
}
devpriv->gpctr_mode[chan] &= ~(G_Output_Mode(0x3));
devpriv->gpctr_mode[chan] |= G_Output_Mode(3);
- //Gating Mode=2
+ //Gating Mode=1
devpriv->gpctr_mode[chan] &= ~(G_Gating_Mode(0x3));
devpriv->gpctr_mode[chan] |= G_Gating_Mode(1);//TIM 4/24/01 was 2
- // Trigger_Mode_For_Edge_Gate=0
+ // Trigger_Mode_For_Edge_Gate=2
devpriv->gpctr_mode[chan] &= ~(G_Trigger_Mode_For_Edge_Gate(0x3));
devpriv->gpctr_mode[chan] |= G_Trigger_Mode_For_Edge_Gate(2);//TIM 4/24/01 was 0
devpriv->gpctr_mode[chan] &= ~G_Loading_On_TC;
devpriv->gpctr_mode[chan] &= ~G_Gate_On_Both_Edges;
- // Stop_Mode = 2
+ // Stop_Mode = 0
devpriv->gpctr_mode[chan] &= ~(G_Stop_Mode(0x3));
devpriv->gpctr_mode[chan] |= G_Stop_Mode(0);
//printk("exit GPCTR_Pulse_Width_Meas\n");
}
+/* The Gate acts as a trigger */
+void GPCTR_Gen_Single_Pulse(comedi_device *dev, int chan, unsigned int length){
+ int temp;
+
+ printk("GPCTR_Gen_Cont...");
+
+ devpriv->gpctr_cur_operation[chan] = GPCTR_SINGLE_PULSE_OUT;
+
+ //TIM 4/26/01 check current counter value...
+ //This appears to work correctly, except that the output value does
+ //not propogate to the output pin. This is done in Analog_Trigger_Etc_Register
+ //which isn't #def'd yet...
+ temp = GPCTR_G_Watch(dev,chan);
+ printk("current counter value is %d\n",temp);
+ temp = win_in(Joint_Status_2_Register);
+ printk("JSR2 = 0x%04x\n",temp);
+
+ // Set length of the pulse
+ GPCTR_Load_B(dev,chan, length-1);
+
+ //Load next time using B, This is reset by GPCTR_Load_Using_A()
+ devpriv->gpctr_mode[chan] |= G_Load_Source_Select;
+
+ devpriv->gpctr_mode[chan] &= ~G_OR_Gate;
+ devpriv->gpctr_mode[chan] &= ~G_Gate_Select_Load_Source;
+
+ // Output_Mode = 3
+ devpriv->gpctr_mode[chan] &= ~(G_Output_Mode(0x3));
+ devpriv->gpctr_mode[chan] |= G_Output_Mode(2); //TIM 4/26/01 was 3
+
+ //Gating Mode=0 for untriggered single pulse
+ devpriv->gpctr_mode[chan] &= ~(G_Gating_Mode(0x3));
+ devpriv->gpctr_mode[chan] |= G_Gating_Mode(0); //TIM 4/25/01 was 1
+
+ // Trigger_Mode_For_Edge_Gate=0
+ devpriv->gpctr_mode[chan] &= ~(G_Trigger_Mode_For_Edge_Gate(0x3));
+ devpriv->gpctr_mode[chan] |= G_Trigger_Mode_For_Edge_Gate(2);
+
+
+ devpriv->gpctr_mode[chan] |= G_Reload_Source_Switching;
+ devpriv->gpctr_mode[chan] &= ~G_Loading_On_Gate;
+ devpriv->gpctr_mode[chan] |= G_Loading_On_TC; //TIM 4/25/01
+ devpriv->gpctr_mode[chan] &= ~G_Gate_On_Both_Edges;
+
+ // Stop_Mode = 2
+ devpriv->gpctr_mode[chan] &= ~(G_Stop_Mode(0x3));
+ devpriv->gpctr_mode[chan] |= G_Stop_Mode(2); //TIM 4/25/01
+
+ // Counting_Once = 2
+ devpriv->gpctr_mode[chan] &= ~(G_Counting_Once(0x3));
+ devpriv->gpctr_mode[chan] |= G_Counting_Once(1); //TIM 4/25/01
+
+ // Up_Down = 1
+ devpriv->gpctr_command[chan] &= ~(G_Up_Down(0x3));
+ devpriv->gpctr_command[chan] |= G_Up_Down(0); //TIM 4/25/01 was 1
+
+ win_out( devpriv->gpctr_mode[chan],G_Mode_Register(chan));
+ win_out( devpriv->gpctr_command[chan],G_Command_Register(chan));
+
+ printk("exit GPCTR_Gen_Cont\n");
+}
+
void GPCTR_Reset(comedi_device *dev, int chan){
unsigned long irqflags;
int temp_ack_reg=0;
retval=GPCTR_Set_Direction(dev,insn->chanspec,data[1]);
break;
case GPCTR_SET_OPERATION:
- if(insn->n!=2)return -EINVAL;
+ if(insn->n!=3)return -EINVAL;
switch(data[1]){
case GPCTR_SIMPLE_EVENT:
GPCTR_Event_Counting(dev,insn->chanspec);
case GPCTR_SINGLE_PW:
GPCTR_Pulse_Width_Meas(dev,insn->chanspec);
break;
+ case GPCTR_SINGLE_PULSE_OUT:
+ GPCTR_Gen_Single_Pulse(dev,insn->chanspec,data[2]);
+ break;
default:
printk("unsupported GPCTR operation!\n");
return -EINVAL;
break;
case GPCTR_ARM:
if(insn->n!=1)return -EINVAL;
+ printk("arming...\n"); //TIM 4/26/01 debugging
retval=GPCTR_Arm(dev,insn->chanspec);
break;
case GPCTR_DISARM: