Added mode bit for selecting load a/b counter load sources on NI general-

purpose counters.  Renamed a couple members of the ni_gpct_arm_source
enum.  Added a few lines of documentation about some additional
INSN_CONFIG.

diff --git a/Documentation/comedi/insn_config b/Documentation/comedi/insn_config
index 0077312cc90269e02c5030bae76cdb52462f5457..86e779fd4ae55b560e5092c53b8d66c2a00ace7a 100644 (file)
--- a/Documentation/comedi/insn_config
+++ b/Documentation/comedi/insn_config
@@ -257,3 +257,12 @@ ID=INSN_CONFIG_ARM: Arm a device (such as a counter) to start on the specified s
 
 ID=INSN_CONFIG_DISARM: Disarm a device (such as a counter) and force it to stop.
        [0] - ID
+
+ID=INSN_CONFIG_RESET_COUNT: Resets a counter's count to zero.  On NI general-purpose
+       counters, it also has the side-effect of disarming the counter.
+       [0] - ID
+
+ID=INSN_CONFIG_SET_COUNTER_MODE: Set a counter's mode.  The specific meaning of the
+       the mode field is hardware-dependent.
+       [0] - ID
+       [1] - mode

diff --git a/comedi/drivers/ni_tio.c b/comedi/drivers/ni_tio.c
index 67128c4409422ef3dba1102508f353ef3d4d6d3d..e764e31d5cb0ee9225462b7d0d7948d2ed40d08d 100644 (file)
--- a/comedi/drivers/ni_tio.c
+++ b/comedi/drivers/ni_tio.c
@@ -800,7 +800,8 @@ static int ni_tio_set_counter_mode(struct ni_gpct *counter, unsigned mode)
        static const unsigned mode_reg_direct_mask = NI_GPCT_GATE_ON_BOTH_EDGES_BIT |
                NI_GPCT_EDGE_GATE_MODE_MASK | NI_GPCT_STOP_MODE_MASK |
                NI_GPCT_OUTPUT_MODE_MASK | NI_GPCT_HARDWARE_DISARM_MASK |
-               NI_GPCT_LOADING_ON_TC_BIT | NI_GPCT_LOADING_ON_GATE_BIT;
+               NI_GPCT_LOADING_ON_TC_BIT | NI_GPCT_LOADING_ON_GATE_BIT |
+               NI_GPCT_LOAD_B_SELECT_BIT;
 
        switch(mode & NI_GPCT_RELOAD_SOURCE_MASK)
        {
@@ -872,10 +873,10 @@ static int ni_tio_arm(struct ni_gpct *counter, int arm, unsigned start_trigger)
        {
                switch(start_trigger)
                {
-               case NI_GPCT_ARM_IMMEDIATE_START:
+               case NI_GPCT_ARM_IMMEDIATE:
                        command_bits |= Gi_Arm_Bit;
                        break;
-               case NI_GPCT_ARM_PAIRED_IMMEDIATE_START:
+               case NI_GPCT_ARM_PAIRED_IMMEDIATE:
                        command_bits |= Gi_Arm_Bit | Gi_Arm_Copy_Bit;
                        break;
                default:
@@ -886,8 +887,8 @@ static int ni_tio_arm(struct ni_gpct *counter, int arm, unsigned start_trigger)
                        const unsigned counting_mode_reg = NITIO_Gi_Counting_Mode_Reg(counter->counter_index);
                        switch(start_trigger)
                        {
-                       case NI_GPCT_ARM_IMMEDIATE_START:
-                       case NI_GPCT_ARM_PAIRED_IMMEDIATE_START:
+                       case NI_GPCT_ARM_IMMEDIATE:
+                       case NI_GPCT_ARM_PAIRED_IMMEDIATE:
                                counter->regs[counting_mode_reg] &= ~Gi_HW_Arm_Enable_Bit;
                                break;
                        default:

diff --git a/include/linux/comedi.h b/include/linux/comedi.h
index 0ff09e803558bda6ceafa7136c62046afb5d50bc..7903b594d81b2ba76dbbc08233a02e55b6f5d5fc 100644 (file)
--- a/include/linux/comedi.h
+++ b/include/linux/comedi.h
@@ -525,6 +525,7 @@ enum ni_gpct_mode_bits
        NI_GPCT_STOP_ON_GATE_BITS = 0x00,
        NI_GPCT_STOP_ON_GATE_OR_TC_BITS = 0x20,
        NI_GPCT_STOP_ON_GATE_OR_SECOND_TC_BITS = 0x40,
+       NI_GPCT_LOAD_B_SELECT_BIT = 0x80,
        NI_GPCT_OUTPUT_MODE_MASK = 0x300,
        NI_GPCT_OUTPUT_TC_PULSE_BITS = 0x100,
        NI_GPCT_OUTPUT_TC_TOGGLE_BITS = 0x200,
@@ -645,9 +646,9 @@ static inline unsigned NI_GPCT_UP_DOWN_PIN_GATE_SELECT(unsigned n)
 INSN_CONFIG_ARM */
 enum ni_gpct_arm_source
 {
-       NI_GPCT_ARM_IMMEDIATE_START = 0x0,
-       NI_GPCT_ARM_PAIRED_IMMEDIATE_START = 0x1, /* Start both the counter and the adjacent paired counter simultaneously */
-       /* NI doesn't document bits for selecting hardware start triggers.  If
+       NI_GPCT_ARM_IMMEDIATE = 0x0,
+       NI_GPCT_ARM_PAIRED_IMMEDIATE = 0x1, /* Start both the counter and the adjacent paired counter simultaneously */
+       /* NI doesn't document bits for selecting hardware arm triggers.  If
        the NI_GPCT_ARM_UNKNOWN bit is set, we will pass the least significant
        bits (3 bits for 660x or 5 bits for m-series) through to the hardware.
        This will at least allow someone to figure out what the bits do later.*/