mips.py: include R4x00 and loongson workarounds in mips3

diff --git a/modules/catalyst/arch/mips.py b/modules/catalyst/arch/mips.py
index 4c4af0c56acfa43552adecf56f3ceabccf6291e2..16ec2074d9a3bcff83c61e4f860d4096ec16f8b6 100644 (file)
--- a/modules/catalyst/arch/mips.py
+++ b/modules/catalyst/arch/mips.py
@@ -45,26 +45,26 @@ class arch_mips3(generic_mips):
        "Builder class for MIPS III [Big-endian]"
        def __init__(self,myspec):
                generic_mips.__init__(self,myspec)
-               self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -pipe"
+               self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips3_n32(generic_mips64):
        "Builder class for MIPS III [Big-endian N32]"
        def __init__(self,myspec):
                generic_mips64.__init__(self,myspec)
-               self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -pipe"
+               self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips3_n64(generic_mips64):
        "Builder class for MIPS III [Big-endian N64]"
        def __init__(self,myspec):
                generic_mips64.__init__(self,myspec)
-               self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -pipe"
+               self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips3_multilib(generic_mips64,generic_multilib):
        "Builder class for MIPS III [Big-endian multilib]"
        def __init__(self,myspec):
                generic_mips64.__init__(self,myspec)
                generic_multilib.__init__(self,myspec)
-               self.settings["CFLAGS"]="-O2 -mips3 -pipe"
+               self.settings["CFLAGS"]="-O2 -mips3 -mfix-r4000 -mfix-r4400 -pipe"
 
 class arch_mips4(generic_mips64):
        "Builder class for MIPS IV [Big-endian]"
@@ -101,26 +101,26 @@ class arch_mipsel3(generic_mipsel):
        "Builder class for all MIPS III [Little-endian]"
        def __init__(self,myspec):
                generic_mipsel.__init__(self,myspec)
-               self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -pipe"
+               self.settings["CFLAGS"]="-O2 -mips3 -mabi=32 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_mipsel3_n32(generic_mips64el):
        "Builder class for all MIPS III [Little-endian N32]"
        def __init__(self,myspec):
                generic_mips64el.__init__(self,myspec)
-               self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -pipe"
+               self.settings["CFLAGS"]="-O2 -mips3 -mabi=n32 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_mipsel3_n64(generic_mips64el):
        "Builder class for MIPS III [Little-endian N64]"
        def __init__(self,myspec):
                generic_mips64el.__init__(self,myspec)
-               self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -pipe"
+               self.settings["CFLAGS"]="-O2 -mips3 -mabi=64 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_mipsel3_multilib(generic_mips64el,generic_multilib):
        "Builder class for MIPS III [Little-endian multilib]"
        def __init__(self,myspec):
                generic_mips64el.__init__(self,myspec)
                generic_multilib.__init__(self,myspec)
-               self.settings["CFLAGS"]="-O2 -mips3 -pipe"
+               self.settings["CFLAGS"]="-O2 -mips3 -Wa,-mfix-loongson2f-nop -pipe"
 
 class arch_loongson2e(generic_mipsel):
        "Builder class for all Loongson 2E [Little-endian]"