// if fifo half-full
if(status & ADHFI)
{
- // clear half-full interrupt latch
- outw(devpriv->adc_fifo_bits | INT, devpriv->control_status + INT_ADCFIFO);
// read data
insw(devpriv->adc_fifo + ADCDATA, data, half_fifo);
for(i = 0; i < half_fifo; i++)
}
}
}
+ // clear half-full interrupt latch
+ outw(devpriv->adc_fifo_bits | INT, devpriv->control_status + INT_ADCFIFO);
async->events |= COMEDI_CB_BLOCK;
// else if fifo not empty
}else if(status & (ADNEI | EOBI))
{
- // clear not-empty interrupt latch
- outw(devpriv->adc_fifo_bits | INT, devpriv->control_status + INT_ADCFIFO);
for(i = 0; i < timeout; i++)
{
// break if fifo is empty
break;
}
}
+ // clear not-empty interrupt latch
+ outw(devpriv->adc_fifo_bits | INT, devpriv->control_status + INT_ADCFIFO);
async->events |= COMEDI_CB_BLOCK;
}else if(status & EOAI)
{