#define PCI230_IO2_SIZE 16 /* Size of I/O space 2 */
/* PCI230 i/o space 1 registers. */
-#define PCI230_PPI_X_A 0x00 /* User PPI port A */
-#define PCI230_PPI_X_B 0x01 /* User PPI port B */
-#define PCI230_PPI_X_C 0x02 /* User PPI port C */
-#define PCI230_PPI_X_CMD 0x03 /* User PPI control word */
+#define PCI230_PPI_X_BASE 0x00 /* User PPI (82C55) base */
+#define PCI230_PPI_X_A 0x00 /* User PPI (82C55) port A */
+#define PCI230_PPI_X_B 0x01 /* User PPI (82C55) port B */
+#define PCI230_PPI_X_C 0x02 /* User PPI (82C55) port C */
+#define PCI230_PPI_X_CMD 0x03 /* User PPI (82C55) control word */
+#define PCI230_Z2_CT_BASE 0x14 /* 82C54 counter/timer base */
#define PCI230_Z2_CT0 0x14 /* 82C54 counter/timer 0 */
#define PCI230_Z2_CT1 0x15 /* 82C54 counter/timer 1 */
#define PCI230_Z2_CT2 0x16 /* 82C54 counter/timer 2 */
/* digital i/o subdevice */
if (thisboard->have_dio) {
rc = subdev_8255_init(dev, s, NULL,
- (devpriv->pci_iobase + PCI230_PPI_X_A));
+ (devpriv->pci_iobase + PCI230_PPI_X_BASE));
if (rc < 0)
return rc;
} else {
divisor = ns / pci230_timebase[clk_src];
- i8254_load(devpriv->pci_iobase + PCI230_Z2_CT0, 0, ct, divisor, 1);
+ i8254_load(devpriv->pci_iobase + PCI230_Z2_CT_BASE, 0, ct, divisor, 1);
/* Counter ct, divisor, mode 1 */
/* PCI 230 specific - ties up counter clk input with correct clk source
TRIG_ROUND_MASK);
/* Generic i8254_load calls; program counters' divide ratios. */
- i8254_load(devpriv->pci_iobase + PCI230_Z2_CT0, 0, ct, divisor, 3);
+ i8254_load(devpriv->pci_iobase + PCI230_Z2_CT_BASE, 0, ct, divisor, 3);
/* Counter ct, divisor, square wave (8254 mode 3). */
/* PCI 230 specific - ties up counter clk input with clk source */
static void pci230_cancel_ct(comedi_device *dev, unsigned int ct)
{
- i8254_load(devpriv->pci_iobase + PCI230_Z2_CT0, 0, ct, 0, 0);
+ i8254_load(devpriv->pci_iobase + PCI230_Z2_CT_BASE, 0, ct, 0, 0);
/* Counter ct, divisor 0, 8254 mode 0. */
}