* FMH
*/
-static const int i8254_control_reg = 3;
+#define i8254_control_reg 3
-static inline int i8254_load(unsigned long base_address,
+static inline int i8254_load(unsigned long base_address, unsigned int regshift,
unsigned int counter_number, unsigned int count, unsigned int mode)
{
unsigned int byte;
byte = counter_number << 6;
byte |= 0x30; // load low then high byte
byte |= (mode << 1); // set counter mode
- outb(byte, base_address + i8254_control_reg);
+ outb(byte, base_address + (i8254_control_reg << regshift));
byte = count & 0xff; // lsb of counter value
- outb(byte, base_address + counter_number);
+ outb(byte, base_address + (counter_number << regshift));
byte = (count >> 8) & 0xff; // msb of counter value
- outb(byte, base_address + counter_number);
+ outb(byte, base_address + (counter_number << regshift));
return 0;
}
-static inline int i8254_mm_load(void *base_address,
+static inline int i8254_mm_load(void *base_address, unsigned int regshift,
unsigned int counter_number, unsigned int count, unsigned int mode)
{
unsigned int byte;
byte = counter_number << 6;
byte |= 0x30; // load low then high byte
byte |= (mode << 1); // set counter mode
- writeb(byte, base_address + i8254_control_reg);
+ writeb(byte, base_address + (i8254_control_reg << regshift));
byte = count & 0xff; // lsb of counter value
- writeb(byte, base_address + counter_number);
+ writeb(byte, base_address + (counter_number << regshift));
byte = (count >> 8) & 0xff; // msb of counter value
- writeb(byte, base_address + counter_number);
+ writeb(byte, base_address + (counter_number << regshift));
return 0;
}
/* Returns 16 bit counter value, should work for 8253 also.*/
-static inline int i8254_read(unsigned long base_address, unsigned int counter_number)
+static inline int i8254_read(unsigned long base_address, unsigned int regshift,
+ unsigned int counter_number)
{
unsigned int byte;
int ret;
// latch counter
byte = counter_number << 6;
- outb(byte, base_address + i8254_control_reg);
+ outb(byte, base_address + (i8254_control_reg << regshift));
// read lsb
- ret = inb(base_address + counter_number);
+ ret = inb(base_address + (counter_number << regshift));
// read msb
- ret += inb(base_address + counter_number) << 8;
+ ret += inb(base_address + (counter_number << regshift)) << 8;
return ret;
}
-static inline int i8254_mm_read(void *base_address, unsigned int counter_number)
+static inline int i8254_mm_read(void *base_address, unsigned int regshift,
+ unsigned int counter_number)
{
unsigned int byte;
int ret;
- static const int counter_control = 3;
if(counter_number > 2) return -1;
// latch counter
byte = counter_number << 6;
- writeb(byte, base_address + counter_control);
+ writeb(byte, base_address + (i8254_control_reg << regshift));
// read lsb
- ret = readb(base_address + counter_number);
+ ret = readb(base_address + (counter_number << regshift));
// read msb
- ret += readb(base_address + counter_number) << 8;
+ ret += readb(base_address + (counter_number << regshift)) << 8;
return ret;
}
/* Loads 16 bit initial counter value, should work for 8253 also. */
static inline void i8254_write(unsigned long base_address,
- unsigned int counter_number, unsigned int count)
+ unsigned int regshift, unsigned int counter_number, unsigned int count)
{
unsigned int byte;
if(counter_number > 2) return;
byte = count & 0xff; // lsb of counter value
- outb(byte, base_address + counter_number);
+ outb(byte, base_address + (counter_number << regshift));
byte = (count >> 8) & 0xff; // msb of counter value
- outb(byte, base_address + counter_number);
+ outb(byte, base_address + (counter_number << regshift));
}
static inline void i8254_mm_write(void *base_address,
- unsigned int counter_number, unsigned int count)
+ unsigned int regshift, unsigned int counter_number, unsigned int count)
{
unsigned int byte;
if(counter_number > 2) return;
byte = count & 0xff; // lsb of counter value
- writeb(byte, base_address + counter_number);
+ writeb(byte, base_address + (counter_number << regshift));
byte = (count >> 8) & 0xff; // msb of counter value
- writeb(byte, base_address + counter_number);
+ writeb(byte, base_address + (counter_number << regshift));
}
/* Set counter mode, should work for 8253 also.
* I8254_BCD, I8254_BINARY
*/
static inline int i8254_set_mode(unsigned long base_address,
- unsigned int counter_number, unsigned int mode)
+ unsigned int regshift, unsigned int counter_number, unsigned int mode)
{
unsigned int byte;
- static const int counter_control = 3;
if(counter_number > 2) return -1;
if(mode > (I8254_MODE5 | I8254_BINARY)) return -1;
byte = counter_number << 6;
byte |= 0x30; // load low then high byte
byte |= mode; // set counter mode and BCD|binary
- outb(byte, base_address + counter_control);
+ outb(byte, base_address + (i8254_control_reg << regshift));
return 0;
}
static inline int i8254_mm_set_mode(void *base_address,
- unsigned int counter_number, unsigned int mode)
+ unsigned int regshift, unsigned int counter_number, unsigned int mode)
{
unsigned int byte;
- static const int counter_control = 3;
if(counter_number > 2) return -1;
if(mode > (I8254_MODE5 | I8254_BINARY)) return -1;
byte = counter_number << 6;
byte |= 0x30; // load low then high byte
byte |= mode; // set counter mode and BCD|binary
- writeb(byte, base_address + counter_control);
+ writeb(byte, base_address + (i8254_control_reg << regshift));
return 0;
}
-static inline int i8254_status(unsigned long base_address, int counter_number)
+static inline int i8254_status(unsigned long base_address,
+ unsigned int regshift, unsigned int counter_number)
{
- outb(0xE0 | (2 << counter_number), base_address + i8254_control_reg);
- return inb(base_address + counter_number);
+ outb(0xE0 | (2 << counter_number),
+ base_address + (i8254_control_reg << regshift));
+ return inb(base_address + (counter_number << regshift));
}
-static inline int i8254_mm_status(void *base_address, int counter_number)
+static inline int i8254_mm_status(void *base_address,
+ unsigned int regshift, unsigned int counter_number)
{
- writeb(0xE0 | (2 << counter_number), base_address + i8254_control_reg);
- return readb(base_address + counter_number);
+ writeb(0xE0 | (2 << counter_number),
+ base_address + (i8254_control_reg << regshift));
+ return readb(base_address + (counter_number << regshift));
}
#endif
dio200_subdev_8254 *subpriv = s->private;
int chan = CR_CHAN(insn->chanspec);
- data[0] = i8254_read(subpriv->iobase, chan);
+ data[0] = i8254_read(subpriv->iobase, 0, chan);
return 1;
}
dio200_subdev_8254 *subpriv = s->private;
int chan = CR_CHAN(insn->chanspec);
- i8254_write(subpriv->iobase, chan, data[0]);
+ i8254_write(subpriv->iobase, 0, chan, data[0]);
return 1;
}
switch (data[0]) {
case INSN_CONFIG_8254_SET_MODE:
- ret = i8254_set_mode(subpriv->iobase, chan, data[1]);
+ ret = i8254_set_mode(subpriv->iobase, 0, chan, data[1]);
if (ret < 0) return -EINVAL;
break;
case INSN_CONFIG_8254_READ_STATUS:
- data[1] = i8254_status(subpriv->iobase, chan);
+ data[1] = i8254_status(subpriv->iobase, 0, chan);
break;
case INSN_CONFIG_SET_GATE_SRC:
ret = dio200_set_gate_src(subpriv, chan, data[2]);
/* Initialize channels. */
for (chan = 0; chan < 3; chan++) {
- i8254_set_mode(subpriv->iobase, chan,
+ i8254_set_mode(subpriv->iobase, 0, chan,
I8254_MODE0 | I8254_BINARY);
if (subpriv->has_clk_gat_sce) {
/* Gate source 0 is VCC (logic 1). */
outb(CLK_CONFIG(2, CLK_10MHZ),
devpriv->iobase1 + PCI224_ZCLK_SCE);
/* Load Z2-2 mode (2) and counter (div1). */
- i8254_load(devpriv->iobase1 + PCI224_Z2_CT0,
+ i8254_load(devpriv->iobase1 + PCI224_Z2_CT0, 0,
2, div1, 2);
/* Z2-0 is clocked from Z2-2's output. */
outb(CLK_CONFIG(0, CLK_OUTNM1),
devpriv->iobase1 + PCI224_ZCLK_SCE);
}
/* Load Z2-0 mode (2) and counter (div2). */
- i8254_load(devpriv->iobase1 + PCI224_Z2_CT0, 0, div2, 2);
+ i8254_load(devpriv->iobase1 + PCI224_Z2_CT0, 0, 0, div2, 2);
}
/*
devpriv->divisor0=pulse_duration/devpriv->clk_src0;
- i8254_load(devpriv->pci_iobase + PCI230_Z2_CT0, 0, devpriv->divisor0, 1); /* Counter 1, mode 1 */
+ i8254_load(devpriv->pci_iobase + PCI230_Z2_CT0, 0, 0, devpriv->divisor0, 1); /* Counter 1, mode 1 */
/* PCI 230 specific - ties up counter clk input with correct clk source */
switch (devpriv->clk_src0) {
i8253_single_ns_to_timer(devpriv->clk_src1, &devpriv->divisor1, ns, TRIG_ROUND_MASK);
/* Generic i8254_load calls; program counters' divide ratios. */
- i8254_load(devpriv->pci_iobase + PCI230_Z2_CT0, 1, devpriv->divisor1, 3); /* Counter 1, divisor1, square wave (8254 mode 3). */
+ i8254_load(devpriv->pci_iobase + PCI230_Z2_CT0, 0, 1, devpriv->divisor1, 3); /* Counter 1, divisor1, square wave (8254 mode 3). */
/* PCI 230 specific - ties up counter clk input with clk source */
switch (devpriv->clk_src1) {
static void pci230_cancel_ct1(comedi_device *dev)
{
devpriv->divisor1 = 0;
- i8254_load(devpriv->pci_iobase + PCI230_Z2_CT0, 1, devpriv->divisor1, 0); /* Counter 1, divisor1, 8254 mode 0. */
+ i8254_load(devpriv->pci_iobase + PCI230_Z2_CT0, 0, 1, devpriv->divisor1, 0); /* Counter 1, divisor1, 8254 mode 0. */
}
/*
i8253_single_ns_to_timer(devpriv->clk_src2, &devpriv->divisor2, ns, TRIG_ROUND_MASK);
/* Generic i8254_load calls; program counters' divide ratios. */
- i8254_load(devpriv->pci_iobase + PCI230_Z2_CT0, 2, devpriv->divisor2, 3); /* Counter 2, divisor2, square wave (8254 mode 3). */
+ i8254_load(devpriv->pci_iobase + PCI230_Z2_CT0, 0, 2, devpriv->divisor2, 3); /* Counter 2, divisor2, square wave (8254 mode 3). */
/* PCI 230 specific - ties up counter clk input with clk source */
switch (devpriv->clk_src2) {
static void pci230_cancel_ct2(comedi_device *dev)
{
devpriv->divisor2 = 0;
- i8254_load(devpriv->pci_iobase + PCI230_Z2_CT0, 2, devpriv->divisor2, 0); /* Counter 2, divisor2, 8254 mode 0. */
+ i8254_load(devpriv->pci_iobase + PCI230_Z2_CT0, 0, 2, devpriv->divisor2, 0); /* Counter 2, divisor2, 8254 mode 0. */
}
/* Interrupt handler */
cmd->flags);
/* Write the values of ctr1 and ctr2 into counters 1 and 2 */
- i8254_load(devpriv->pacer_counter_dio + DAC8254, 1, devpriv->ao_divisor1, 2);
- i8254_load(devpriv->pacer_counter_dio + DAC8254, 2, devpriv->ao_divisor2, 2);
+ i8254_load(devpriv->pacer_counter_dio + DAC8254, 0, 1, devpriv->ao_divisor1, 2);
+ i8254_load(devpriv->pacer_counter_dio + DAC8254, 0, 2, devpriv->ao_divisor2, 2);
}
// set number of conversions
&(devpriv->divisor2), ns, rounding_flags & TRIG_ROUND_MASK);
/* Write the values of ctr1 and ctr2 into counters 1 and 2 */
- i8254_load(devpriv->pacer_counter_dio + ADC8254, 1, devpriv->divisor1, 2);
- i8254_load(devpriv->pacer_counter_dio + ADC8254, 2, devpriv->divisor2, 2);
+ i8254_load(devpriv->pacer_counter_dio + ADC8254, 0, 1, devpriv->divisor1, 2);
+ i8254_load(devpriv->pacer_counter_dio + ADC8254, 0, 2, devpriv->divisor2, 2);
}
static void write_calibration_bitstream( comedi_device *dev, unsigned int register_bits,
&(devpriv->divisor2), &ns, rounding_flags & TRIG_ROUND_MASK);
/* Write the values of ctr1 and ctr2 into counters 1 and 2 */
- i8254_load(dev->iobase + DAS16_CNTR0_DATA, 1, devpriv->divisor1, 2);
- i8254_load(dev->iobase + DAS16_CNTR0_DATA, 2, devpriv->divisor2, 2);
+ i8254_load(dev->iobase + DAS16_CNTR0_DATA, 0, 1, devpriv->divisor1, 2);
+ i8254_load(dev->iobase + DAS16_CNTR0_DATA, 0, 2, devpriv->divisor2, 2);
return ns;
}
/* Initialize lower half of hardware counter, used to determine how
* many samples are in fifo. Value doesn't actually load into counter
* until counter's next clock (the next a/d conversion) */
- i8254_load(dev->iobase + DAS16M1_8254_FIRST, 1, 0, 2);
+ i8254_load(dev->iobase + DAS16M1_8254_FIRST, 0, 1, 0, 2);
/* remember current reading of counter so we know when counter has
* actually been loaded */
- devpriv->initial_hw_count = i8254_read(dev->iobase + DAS16M1_8254_FIRST, 1);
+ devpriv->initial_hw_count = i8254_read(dev->iobase + DAS16M1_8254_FIRST, 0, 1);
/* setup channel/gain queue */
for(i = 0; i < cmd->chanlist_len; i++)
{
cmd = &async->cmd;
// figure out how many samples are in fifo
- hw_counter = i8254_read(dev->iobase + DAS16M1_8254_FIRST, 1);
+ hw_counter = i8254_read(dev->iobase + DAS16M1_8254_FIRST, 0, 1);
/* make sure hardware counter reading is not bogus due to initial value
* not having been loaded yet */
if(devpriv->adc_count == 0 && hw_counter == devpriv->initial_hw_count)
&(devpriv->divisor2), &ns, rounding_flags & TRIG_ROUND_MASK);
/* Write the values of ctr1 and ctr2 into counters 1 and 2 */
- i8254_load(dev->iobase + DAS16M1_8254_SECOND, 1, devpriv->divisor1, 2);
- i8254_load(dev->iobase + DAS16M1_8254_SECOND, 2, devpriv->divisor2, 2);
+ i8254_load(dev->iobase + DAS16M1_8254_SECOND, 0, 1, devpriv->divisor1, 2);
+ i8254_load(dev->iobase + DAS16M1_8254_SECOND, 0, 2, devpriv->divisor2, 2);
return ns;
}
if(cmd.stop_src == TRIG_EXT)
{
// load counter 0 in mode 0
- i8254_load(dev->iobase + DAS1800_COUNTER, 0, 1, 0);
+ i8254_load(dev->iobase + DAS1800_COUNTER, 0, 0, 1, 0);
}
return 0;
int err = 0;
// counter 1, mode 2
- if(i8254_load(dev->iobase + DAS1800_COUNTER, 1, devpriv->divisor1, 2)) err++;
+ if(i8254_load(dev->iobase + DAS1800_COUNTER, 0, 1, devpriv->divisor1, 2)) err++;
// counter 2, mode 2
- if(i8254_load(dev->iobase + DAS1800_COUNTER, 2, devpriv->divisor2, 2)) err++;
+ if(i8254_load(dev->iobase + DAS1800_COUNTER, 0, 2, devpriv->divisor2, 2)) err++;
if(err)
return -1;
{
int err = 0;
- if(i8254_load(dev->iobase + DAS800_8254, 1, devpriv->divisor1, 2)) err++;
- if(i8254_load(dev->iobase + DAS800_8254, 2, devpriv->divisor2, 2)) err++;
+ if(i8254_load(dev->iobase + DAS800_8254, 0, 1, devpriv->divisor1, 2)) err++;
+ if(i8254_load(dev->iobase + DAS800_8254, 0, 2, devpriv->divisor2, 2)) err++;
if(err)
return -1;
outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG);
// may need to wait 72 sampling periods if timing was changed
- i8254_load(dev->iobase + I8253_BASE_REG, 2, 72, 0);
+ i8254_load(dev->iobase + I8253_BASE_REG, 0, 2, 72, 0);
// setup start triggering
trigger_bits = 0;
unsigned int counter_number, unsigned int count, unsigned int mode)
{
if(thisboard->memory_mapped_io)
- return i8254_mm_load((void*)base_address, counter_number, count, mode);
+ return i8254_mm_load((void*)base_address, 0, counter_number, count, mode);
else
- return i8254_load(base_address, counter_number, count, mode);
+ return i8254_load(base_address, 0, counter_number, count, mode);
}
int labpc_common_attach( comedi_device *dev, unsigned long iobase,