dev-ml/llvm-ocaml: RISCV is no longer exp. in 9.0+
authorMichał Górny <mgorny@gentoo.org>
Mon, 12 Aug 2019 12:31:43 +0000 (14:31 +0200)
committerMichał Górny <mgorny@gentoo.org>
Mon, 12 Aug 2019 13:20:45 +0000 (15:20 +0200)
Closes: https://bugs.gentoo.org/691816
Signed-off-by: Michał Górny <mgorny@gentoo.org>
dev-ml/llvm-ocaml/llvm-ocaml-10.0.0.9999.ebuild
dev-ml/llvm-ocaml/llvm-ocaml-9.0.0.9999.ebuild

index e354e476534050013abc87e9c772dd0251beab24..9b4fa23f13883d98d6965f0bccd87eebdd0168a7 100644 (file)
@@ -17,9 +17,9 @@ EGIT_REPO_URI="https://git.llvm.org/git/llvm.git
        https://github.com/llvm-mirror/llvm.git"
 
 # Keep in sync with sys-devel/llvm
-ALL_LLVM_EXPERIMENTAL_TARGETS=( AVR Nios2 RISCV )
+ALL_LLVM_EXPERIMENTAL_TARGETS=( AVR Nios2 )
 ALL_LLVM_TARGETS=( AArch64 AMDGPU ARM BPF Hexagon Lanai Mips MSP430
-       NVPTX PowerPC Sparc SystemZ WebAssembly X86 XCore
+       NVPTX PowerPC RISCV Sparc SystemZ WebAssembly X86 XCore
        "${ALL_LLVM_EXPERIMENTAL_TARGETS[@]}" )
 ALL_LLVM_TARGETS=( "${ALL_LLVM_TARGETS[@]/#/llvm_targets_}" )
 LLVM_TARGET_USEDEPS=${ALL_LLVM_TARGETS[@]/%/?}
index 28e3cb65696cdde3b442a836ddf2f8f7debf0d05..973c0c74dc5c86717e4dcc84e9561c6d7fa29eb3 100644 (file)
@@ -19,7 +19,7 @@ EGIT_BRANCH="release_90"
 
 # Keep in sync with sys-devel/llvm
 ALL_LLVM_TARGETS=( AArch64 AMDGPU ARM BPF Hexagon Lanai Mips MSP430
-       NVPTX PowerPC Sparc SystemZ WebAssembly X86 XCore )
+       NVPTX PowerPC RISCV Sparc SystemZ WebAssembly X86 XCore )
 ALL_LLVM_TARGETS=( "${ALL_LLVM_TARGETS[@]/#/llvm_targets_}" )
 LLVM_TARGET_USEDEPS=${ALL_LLVM_TARGETS[@]/%/?}