sci-electronics/iverilog: x86 stable wrt bug #713730
authorAgostino Sarubbo <ago@gentoo.org>
Sun, 22 Mar 2020 10:37:36 +0000 (11:37 +0100)
committerAgostino Sarubbo <ago@gentoo.org>
Sun, 22 Mar 2020 10:37:36 +0000 (11:37 +0100)
Package-Manager: Portage-2.3.89, Repoman-2.3.20
RepoMan-Options: --include-arches="x86"
Signed-off-by: Agostino Sarubbo <ago@gentoo.org>
sci-electronics/iverilog/iverilog-10.3.ebuild

index abb406c6c94dc141ed691a9528643bb5f4b6f238..b4ec605119895a8c1c69b92d1b878d5a6646e311 100644 (file)
@@ -18,7 +18,7 @@ if [[ ${PV} == "9999" ]] ; then
        EGIT_REPO_URI="https://github.com/steveicarus/${PN}.git"
 else
        SRC_URI="https://github.com/steveicarus/${PN}/archive/v${GITHUB_PV}.tar.gz -> ${P}.tar.gz"
-       KEYWORDS="~alpha amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sh ~sparc ~x86"
+       KEYWORDS="~alpha amd64 ~arm ~arm64 ~hppa ~ia64 ~m68k ~mips ~ppc ~ppc64 ~riscv ~s390 ~sh ~sparc x86"
        S="${WORKDIR}/${PN}-${GITHUB_PV}"
 fi