amcc->pci_slot=PCI_SLOT(pcidev->devfn);
amcc->pci_func=PCI_FUNC(pcidev->devfn);
for (i=0;i<5;i++)
- amcc->io_addr[i]=pci_resource_start(pcidev, i) & PCI_BASE_ADDRESS_IO_MASK;
+ amcc->io_addr[i]=pci_resource_start(pcidev, i);
amcc->irq=pcidev->irq;
#if LINUX_VERSION_CODE < 0x020300
amcc->master=pcidev->master;
#else
-// amcc->master=pcidev->master; // how get this information under 2.4 kernels?
+ amcc->master=1;
#endif
}
if (!amcc) return -1;
if (amcc->used) return 1;
+ if(pci_enable_device(amcc->pcidev)) return -1;
+ pci_set_master(amcc->pcidev);
amcc->used=1;
+
return 0;
}
/* Read base addressses of the PCI230's two I/O regions from PCI configuration register. */
if(pci_enable_device(pci_dev)<0)return -EIO;
- pci_iobase = pci_resource_start(pci_dev, 2) & PCI_BASE_ADDRESS_IO_MASK;
- iobase = pci_resource_start(pci_dev, 3) & PCI_BASE_ADDRESS_IO_MASK;
+ pci_iobase = pci_resource_start(pci_dev, 2);
+ iobase = pci_resource_start(pci_dev, 3);
printk("comedi%d: amplc_pci230: I/O region 1 0x%04x I/O region 2 0x%04x\n",dev->minor, pci_iobase, iobase);
*/
if(pci_enable_device(devpriv->pci_dev))
return -EIO;
- s5933_config = pci_resource_start(devpriv->pci_dev, S5933_BADRINDEX) &
- PCI_BASE_ADDRESS_IO_MASK;
- control_status = pci_resource_start(devpriv->pci_dev, CONT_STAT_BADRINDEX) &
- PCI_BASE_ADDRESS_IO_MASK;
- adc_fifo = pci_resource_start(devpriv->pci_dev, ADC_FIFO_BADRINDEX) &
- PCI_BASE_ADDRESS_IO_MASK;
- pacer_counter_dio = pci_resource_start(devpriv->pci_dev, PACER_BADRINDEX) &
- PCI_BASE_ADDRESS_IO_MASK;
- ao_registers = pci_resource_start(devpriv->pci_dev, AO_BADRINDEX) &
- PCI_BASE_ADDRESS_IO_MASK;
+ s5933_config = pci_resource_start(devpriv->pci_dev, S5933_BADRINDEX);
+ control_status = pci_resource_start(devpriv->pci_dev, CONT_STAT_BADRINDEX);
+ adc_fifo = pci_resource_start(devpriv->pci_dev, ADC_FIFO_BADRINDEX);
+ pacer_counter_dio = pci_resource_start(devpriv->pci_dev, PACER_BADRINDEX);
+ ao_registers = pci_resource_start(devpriv->pci_dev, AO_BADRINDEX);
// reserve io ports
err = 0;
#ifdef PCIDMA
pci_set_master(pcidev);
#endif
- plx9080_iobase = pci_resource_start(pcidev, PLX9080_BADRINDEX) &
- PCI_BASE_ADDRESS_MEM_MASK;
- main_iobase = pci_resource_start(pcidev, MAIN_BADRINDEX) &
- PCI_BASE_ADDRESS_MEM_MASK;
- dio_counter_iobase = pci_resource_start(pcidev, DIO_COUNTER_BADRINDEX) &
- PCI_BASE_ADDRESS_MEM_MASK;
+ plx9080_iobase = pci_resource_start(pcidev, PLX9080_BADRINDEX);
+ main_iobase = pci_resource_start(pcidev, MAIN_BADRINDEX);
+ dio_counter_iobase = pci_resource_start(pcidev, DIO_COUNTER_BADRINDEX);
if(check_mem_region(plx9080_iobase, PLX9080_IOSIZE))
{
*/
if(pci_enable_device(devpriv->pci_dev))
return -EIO;
- digitalio = pci_resource_start(devpriv->pci_dev, DIGITALIO_BADRINDEX) &
- PCI_BASE_ADDRESS_IO_MASK;
- dac = pci_resource_start(devpriv->pci_dev, DAC_BADRINDEX) &
- PCI_BASE_ADDRESS_IO_MASK;
+ digitalio = pci_resource_start(devpriv->pci_dev, DIGITALIO_BADRINDEX);
+ dac = pci_resource_start(devpriv->pci_dev, DAC_BADRINDEX);
/*
* Allocate the I/O ports.
// read base addresses
if(pci_enable_device(pdev))
return -EIO;
- pci_iobase = pci_resource_start(pdev, 1) & PCI_BASE_ADDRESS_IO_MASK;
- iobase = pci_resource_start(pdev, 2) & PCI_BASE_ADDRESS_IO_MASK;
+ pci_iobase = pci_resource_start(pdev, 1);
+ iobase = pci_resource_start(pdev, 2);
printk("pcibase 0x%x ", pci_iobase);
// reserve io ports for 9052 pci chip
if(check_region(pci_iobase,PCIDAS08_SIZE)<0){
else { inova_devices=inova; }
last=inova;
-#if LINUX_VERSION_CODE < 0x020300
inova->vendor=pcidev->vendor;
inova->device=pcidev->device;
+#if LINUX_VERSION_CODE < 0x020300
inova->master=pcidev->master;
- inova->pci_bus=pcidev->bus->number;
- inova->pci_slot=PCI_SLOT(pcidev->devfn);
- inova->pci_func=PCI_FUNC(pcidev->devfn);
- for (i=0;i<5;i++)
- inova->io_addr[i]=pcidev->base_address[i] & PCI_BASE_ADDRESS_MEM_MASK;
- inova->irq=pcidev->irq;
#else
- inova->vendor=pcidev->vendor;
- inova->device=pcidev->device;
-#if 0
- inova->master=pcidev->master; // how get this information under 2.4 kernels?
+inova->master = 1; //XXX
#endif
inova->pci_bus=pcidev->bus->number;
inova->pci_slot=PCI_SLOT(pcidev->devfn);
inova->pci_func=PCI_FUNC(pcidev->devfn);
for (i=0;i<5;i++)
- inova->io_addr[i]=pcidev->resource[i].start & PCI_BASE_ADDRESS_MEM_MASK;
+ inova->io_addr[i]=pci_resource_start(pcidev, i);
inova->irq=pcidev->irq;
-#endif
-
}
}
for (inova=inova_devices; inova; inova=next) {
next=inova->next;
- printk("%2d %2d %2d 0x%4x 0x%4x %3s 0x%8xl 0x%8xl %2d %2d\n",
+ printk("%2d %2d %2d 0x%4x 0x%4x %3s 0x%8lx 0x%8lx %2d %2d\n",
inova->pci_bus,inova->pci_slot,inova->pci_func,inova->vendor,inova->device,inova->master?"yes":"no",
inova->io_addr[0],inova->io_addr[2],inova->irq,inova->used);
* Initialize base addresses
*/
/* Get the physical address from PCI config */
- physLas0 = pci_resource_start(devpriv->pci_dev, LAS0_PCIINDEX) &
- PCI_BASE_ADDRESS_MEM_MASK;
- physLas1 = pci_resource_start(devpriv->pci_dev, LAS1_PCIINDEX) &
- PCI_BASE_ADDRESS_MEM_MASK;
- physLcfg = pci_resource_start(devpriv->pci_dev, LCFG_PCIINDEX) &
- PCI_BASE_ADDRESS_MEM_MASK;
+ physLas0 = pci_resource_start(devpriv->pci_dev, LAS0_PCIINDEX);
+ physLas1 = pci_resource_start(devpriv->pci_dev, LAS1_PCIINDEX);
+ physLcfg = pci_resource_start(devpriv->pci_dev, LCFG_PCIINDEX);
/* Now have the kernel map this into memory */
/* ASSUME page aligned */
devpriv->las0 = ioremap(physLas0, LAS0_PCISIZE);
#define pci_dma_sync_single(cookie, address, size, dir)
// for getting base addresses
-#define pci_resource_start(dev,bar) ((dev)->base_address[(bar)])
+extern inline unsigned long pci_resource_start(struct pci_dev *dev, unsigned int bar)
+{
+ if(dev->base_address[bar] & PCI_BASE_ADDRESS_SPACE_IO)
+ return dev->base_address[bar] & PCI_BASE_ADDRESS_IO_MASK;
+ return dev->base_address[bar] & PCI_BASE_ADDRESS_MEM_MASK;
+}
#else
#include <linux/version.h>
-#if LINUX_VERSION_CODE < 0x020300
+// XXX 2.2.19 already has vmalloc_32() compatibility, not sure when it was introduced
+#if LINUX_VERSION_CODE < 0x020200
#define vmalloc_32(x) vmalloc((x))
#endif