ai_se_chans: 16,
ai_diff_chans: 8,
ai_bits: 12,
- ai_speed: 3030,
+ ai_speed: 3200,
ranges: &cb_pcidas_ranges,
},
{
ai_se_chans: 16,
ai_diff_chans: 8,
ai_bits: 12,
- ai_speed: 3030,
+ ai_speed: 3200,
ranges: &cb_pcidas_ranges,
},
{
ai_se_chans: 16,
ai_diff_chans: 8,
ai_bits: 12,
- ai_speed: 3030,
+ ai_speed: 3200,
ranges: &cb_pcidas_ranges,
},
{
ai_se_chans: 16,
ai_diff_chans: 8,
ai_bits: 12,
- ai_speed: 6666,
+ ai_speed: 6800,
ao_nchan: 2,
ranges: &cb_pcidas_alt_ranges,
},
ai_se_chans: 16,
ai_diff_chans: 8,
ai_bits: 12,
- ai_speed: 6666,
+ ai_speed: 6800,
ao_nchan: 2,
ranges: &cb_pcidas_ranges,
},
}
// get irq
- if(comedi_request_irq(devpriv->pci_dev->irq, cb_pcidas_interrupt, 0, "cb_pcidas", dev ))
+ if(comedi_request_irq(devpriv->pci_dev->irq, cb_pcidas_interrupt, SA_SHIRQ, "cb_pcidas", dev ))
{
printk(" unable to allocate irq %d\n", devpriv->pci_dev->irq);
return -EINVAL;
/* wait for mux to settle */
/* I suppose I made it with outw_p... */
+ /* clear fifo */
+ outw(0, devpriv->adc_fifo + ADCFIFOCLR);
+
/* convert n samples */
for (n = 0; n < insn->n; n++)
{
- /* clear fifo */
- outw(0, devpriv->adc_fifo + ADCFIFOCLR);
-
/* trigger conversion */
outw(0, devpriv->adc_fifo + ADCDATA);
&(cmd->convert_arg), cmd->flags & TRIG_ROUND_MASK);
if(tmp != cmd->convert_arg)
err++;
- if(cmd->scan_begin_src == TRIG_TIMER &&
- cmd->scan_begin_arg < cmd->convert_arg * cmd->scan_end_arg)
- {
- cmd->scan_begin_arg = cmd->convert_arg * cmd->scan_end_arg;
- err++;
- }
}
if(err) return 4;
{
for(i = 0; i < timeout; i++)
{
+ // break if fifo is empty
+ if((ADNE & inw(devpriv->control_status + INT_ADCFIFO)) == 0)
+ break;
data[0] = inw(devpriv->adc_fifo);
comedi_buf_put(async, data[0]);
if(async->cmd.stop_src == TRIG_COUNT &&
async->events |= COMEDI_CB_EOA;
break;
}
- // break if fifo is empty
- if((ADNE & inw(devpriv->control_status + INT_ADCFIFO)) == 0)
- break;
}
async->events |= COMEDI_CB_BLOCK;
// clear not-empty interrupt latch
// disable interrupts
devpriv->adc_fifo_bits = 0;
outw(devpriv->adc_fifo_bits, devpriv->control_status + INT_ADCFIFO);
- // software pacer source
- outw(0, devpriv->control_status + ADCMUX_CONT);
// disable start trigger source and burst mode
outw(0, devpriv->control_status + TRIG_CONTSTAT);
+ // software pacer source
+ outw(0, devpriv->control_status + ADCMUX_CONT);
return 0;