MD5 ee95564bedb8cace16469a654758fed4 gcc-3.4.1.ebuild 30323
MD5 eaccd73f2955ff6549a0f6e29dded1b3 gcc-3.4.1-r2.ebuild 31259
MD5 849d93a55dc7e809cf4e3e04b8444d95 gcc-3.4.1-r3.ebuild 31292
-MD5 b05a52684d756d80bb86d035ad3b004e .ChangeLog.swp 16384
-MD5 557a9d2785165de2d6f2ac3013c8e8d8 ChangeLog 72542
+MD5 0ec3ebe63079d866ebae6aa1781f2930 ChangeLog 72542
MD5 7196ef2e21bcde2f5c7de114cfa5dfc2 gcc-3.3.3-r3.ebuild 23582
MD5 840f9c25e867afe238633c890f8ad71a gcc-3.3.3-r5.ebuild 24366
MD5 083cab66f461d2a9ab2054e8fa7ce28c gcc-3.3.4-r2.ebuild 24911
MD5 56c9a61f1a68e1a62685ee3379d208e6 gcc-3.4.2-r2.ebuild 13478
-MD5 25f418d24c69ca69975db279a0f37185 gcc-3.4.3.ebuild 13037
+MD5 18dee7712729885f6ca3ef7803c203f9 gcc-3.4.3.ebuild 13037
MD5 f7e7042c2ddf66e344b30cbc66ebaf73 files/cc 24
MD5 80d122265d3062847a4a1b161abe1d26 files/cpp 24
MD5 3213bd50acdbbd71ce7dd3e40710e30e files/digest-gcc-2.95.3-r8 64
+++ /dev/null
---- gcc-3.4.0/gcc/config/arm/arm.md.arm-ldm-peephole 2004-01-13 08:24:37.000000000 -0500
-+++ gcc-3.4.0/gcc/config/arm/arm.md 2004-04-24 18:18:04.000000000 -0400
-@@ -8810,13 +8810,16 @@
- (set_attr "length" "4,8,8")]
- )
-
-+; Try to convert LDR+LDR+arith into [add+]LDM+arith
-+; On XScale, LDM is always slower than two LDRs, so only do this if
-+; optimising for size.
- (define_insn "*arith_adjacentmem"
- [(set (match_operand:SI 0 "s_register_operand" "=r")
- (match_operator:SI 1 "shiftable_operator"
- [(match_operand:SI 2 "memory_operand" "m")
- (match_operand:SI 3 "memory_operand" "m")]))
- (clobber (match_scratch:SI 4 "=r"))]
-- "TARGET_ARM && adjacent_mem_locations (operands[2], operands[3])"
-+ "TARGET_ARM && (!arm_tune_xscale || optimize_size) && adjacent_mem_locations (operands[2], operands[3])"
- "*
- {
- rtx ldm[3];
-@@ -8851,6 +8854,8 @@
- }
- if (val1 && val2)
- {
-+ /* This would be a loss on a Harvard core, but adjacent_mem_locations()
-+ will prevent it from happening. */
- rtx ops[3];
- ldm[0] = ops[0] = operands[4];
- ops[1] = XEXP (XEXP (operands[2], 0), 0);
---- gcc-3.4.0/gcc/config/arm/arm.c.arm-ldm-peephole 2004-04-24 18:16:25.000000000 -0400
-+++ gcc-3.4.0/gcc/config/arm/arm.c 2004-04-24 18:18:04.000000000 -0400
-@@ -4593,8 +4593,11 @@
- arith_adjacentmem pattern to output an overlong sequence. */
- if (!const_ok_for_op (PLUS, val0) || !const_ok_for_op (PLUS, val1))
- return 0;
--
-- return (reg0 == reg1) && ((val1 - val0) == 4 || (val0 - val1) == 4);
-+
-+ /* For Harvard cores, only accept pairs where one offset is zero.
-+ See comment in load_multiple_sequence. */
-+ return (reg0 == reg1) && ((val1 - val0) == 4 || (val0 - val1) == 4)
-+ && (!arm_ld_sched || val0 == 0 || val1 == 0);
- }
- return 0;
- }
-@@ -4838,6 +4841,11 @@
- *load_offset = unsorted_offsets[order[0]];
- }
-
-+ /* For XScale a two-word LDM is a performance loss, so only do this if
-+ size is more important. See comments in arm_gen_load_multiple. */
-+ if (nops == 2 && arm_tune_xscale && !optimize_size)
-+ return 0;
-+
- if (unsorted_offsets[order[0]] == 0)
- return 1; /* ldmia */
-
-@@ -5064,6 +5072,11 @@
- *load_offset = unsorted_offsets[order[0]];
- }
-
-+ /* For XScale a two-word LDM is a performance loss, so only do this if
-+ size is more important. See comments in arm_gen_load_multiple. */
-+ if (nops == 2 && arm_tune_xscale && !optimize_size)
-+ return 0;
-+
- if (unsorted_offsets[order[0]] == 0)
- return 1; /* stmia */
-
---- gcc-3.4.0/gcc/genpeep.c.arm-ldm-peephole 2003-07-05 01:27:22.000000000 -0400
-+++ gcc-3.4.0/gcc/genpeep.c 2004-04-24 18:18:04.000000000 -0400
-@@ -381,6 +381,7 @@
- printf ("#include \"recog.h\"\n");
- printf ("#include \"except.h\"\n\n");
- printf ("#include \"function.h\"\n\n");
-+ printf ("#include \"flags.h\"\n\n");
-
- printf ("#ifdef HAVE_peephole\n");
- printf ("extern rtx peep_operand[];\n\n");
+++ /dev/null
---- gcc-3.4.0/gcc/config/arm/arm.c.arm-ldm 2004-02-27 09:51:05.000000000 -0500
-+++ gcc-3.4.0/gcc/config/arm/arm.c 2004-04-24 18:16:25.000000000 -0400
-@@ -8520,6 +8520,26 @@
- return_used_this_function = 0;
- }
-
-+/* Return the number (counting from 0) of
-+ the least significant set bit in MASK. */
-+
-+#ifdef __GNUC__
-+inline
-+#endif
-+static int
-+number_of_first_bit_set (mask)
-+ int mask;
-+{
-+ int bit;
-+
-+ for (bit = 0;
-+ (mask & (1 << bit)) == 0;
-+ ++bit)
-+ continue;
-+
-+ return bit;
-+}
-+
- const char *
- arm_output_epilogue (rtx sibling)
- {
-@@ -8753,27 +8773,47 @@
- saved_regs_mask |= (1 << PC_REGNUM);
- }
-
-- /* Load the registers off the stack. If we only have one register
-- to load use the LDR instruction - it is faster. */
-- if (saved_regs_mask == (1 << LR_REGNUM))
-- {
-- /* The exception handler ignores the LR, so we do
-- not really need to load it off the stack. */
-- if (eh_ofs)
-- asm_fprintf (f, "\tadd\t%r, %r, #4\n", SP_REGNUM, SP_REGNUM);
-- else
-- asm_fprintf (f, "\tldr\t%r, [%r], #4\n", LR_REGNUM, SP_REGNUM);
-- }
-- else if (saved_regs_mask)
-+ if (saved_regs_mask)
- {
-- if (saved_regs_mask & (1 << SP_REGNUM))
-- /* Note - write back to the stack register is not enabled
-- (ie "ldmfd sp!..."). We know that the stack pointer is
-- in the list of registers and if we add writeback the
-- instruction becomes UNPREDICTABLE. */
-- print_multi_reg (f, "ldmfd\t%r", SP_REGNUM, saved_regs_mask);
-+ /* Load the registers off the stack. If we only have one register
-+ to load use the LDR instruction - it is faster. */
-+ if (bit_count (saved_regs_mask) == 1)
-+ {
-+ int reg = number_of_first_bit_set (saved_regs_mask);
-+
-+ switch (reg)
-+ {
-+ case SP_REGNUM:
-+ /* Mustn't use base writeback when loading SP. */
-+ asm_fprintf (f, "\tldr\t%r, [%r]\n", SP_REGNUM, SP_REGNUM);
-+ break;
-+
-+ case LR_REGNUM:
-+ if (eh_ofs)
-+ {
-+ /* The exception handler ignores the LR, so we do
-+ not really need to load it off the stack. */
-+ asm_fprintf (f, "\tadd\t%r, %r, #4\n", SP_REGNUM, SP_REGNUM);
-+ break;
-+ }
-+ /* else fall through */
-+
-+ default:
-+ asm_fprintf (f, "\tldr\t%r, [%r], #4\n", reg, SP_REGNUM);
-+ break;
-+ }
-+ }
- else
-- print_multi_reg (f, "ldmfd\t%r!", SP_REGNUM, saved_regs_mask);
-+ {
-+ if (saved_regs_mask & (1 << SP_REGNUM))
-+ /* Note - write back to the stack register is not enabled
-+ (ie "ldmfd sp!..."). We know that the stack pointer is
-+ in the list of registers and if we add writeback the
-+ instruction becomes UNPREDICTABLE. */
-+ print_multi_reg (f, "ldmfd\t%r", SP_REGNUM, saved_regs_mask);
-+ else
-+ print_multi_reg (f, "ldmfd\t%r!", SP_REGNUM, saved_regs_mask);
-+ }
- }
-
- if (current_function_pretend_args_size)
-@@ -11401,22 +11441,6 @@
- }
- }
-
--/* Return the number (counting from 0) of
-- the least significant set bit in MASK. */
--
--inline static int
--number_of_first_bit_set (int mask)
--{
-- int bit;
--
-- for (bit = 0;
-- (mask & (1 << bit)) == 0;
-- ++bit)
-- continue;
--
-- return bit;
--}
--
- /* Generate code to return from a thumb function.
- If 'reg_containing_return_addr' is -1, then the return address is
- actually on the stack, at the stack pointer. */
+++ /dev/null
---- gcc-3.4.1/libstdc++-v3/libmath/Makefile.am~ 2003-08-27 22:29:42.000000000 +0100
-+++ gcc-3.4.1/libstdc++-v3/libmath/Makefile.am 2004-07-22 16:41:45.152130128 +0100
-@@ -32,7 +32,7 @@
-
- libmath_la_SOURCES = stubs.c
-
--AM_CPPFLAGS = $(CANADIAN_INCLUDES)
-+AM_CPPFLAGS = $(CANADIAN_INCLUDES) -I$(toplevel_srcdir)/include
-
- # Only compiling "C" sources in this directory.
- LIBTOOL = @LIBTOOL@ --tag CC
---- gcc-3.4.1/libstdc++-v3/fragment.am.old 2004-07-22 18:24:58.024083656 +0100
-+++ gcc-3.4.1/libstdc++-v3/fragment.am 2004-07-22 18:24:59.019932264 +0100
-@@ -18,7 +18,7 @@
- $(WARN_FLAGS) $(WERROR) -fdiagnostics-show-location=once
-
- # -I/-D flags to pass when compiling.
--AM_CPPFLAGS = $(GLIBCXX_INCLUDES)
-+AM_CPPFLAGS = $(GLIBCXX_INCLUDES) -I$(toplevel_srcdir)/include
-
-
-
+++ /dev/null
-See http://gcc.gnu.org/PR15068
-
-Fixes error
-
-../sysdeps/generic/s_fmax.c: In function `__fmax':
-../sysdeps/generic/s_fmax.c:28: internal compiler error: in elim_reg_cond, at flow.c:3257
-Please submit a full bug report,
-with preprocessed source if appropriate.
-See <URL:http://gcc.gnu.org/bugs.html> for instructions.
-make[2]: *** [/home/dank/wk/crosstool-0.28-rc35/build/arm-unknown-linux-gnu/gcc-3.4.1-glibc-20040822/build-glibc/math/s_fmax.o] Error 1
-make[2]: Leaving directory `/home/dank/wk/crosstool-0.28-rc35/build/arm-unknown-linux-gnu/gcc-3.4.1-glibc-20040822/glibc-20040822/math'
-make[1]: *** [math/others] Error 2
-make[1]: Leaving directory `/home/dank/wk/crosstool-0.28-rc35/build/arm-unknown-linux-gnu/gcc-3.4.1-glibc-20040822/glibc-20040822'
-make: *** [all] Error 2
-
-[ rediffed against gcc-3.4.1, with elbow grease, ending up with same thing as
-http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/flow.c.diff?cvsroot=gcc&only_with_tag=csl-arm-branch&r1=1.563.4.2&r2=1.563.4.3 ]
-
---- gcc-3.4.1/gcc/flow.c.old 2004-02-27 19:39:19.000000000 -0800
-+++ gcc-3.4.1/gcc/flow.c 2004-08-26 07:29:46.000000000 -0700
-@@ -1878,6 +1878,7 @@
- rtx set_src = SET_SRC (pc_set (BB_END (bb)));
- rtx cond_true = XEXP (set_src, 0);
- rtx reg = XEXP (cond_true, 0);
-+ enum rtx_code inv_cond;
-
- if (GET_CODE (reg) == SUBREG)
- reg = SUBREG_REG (reg);
-@@ -1886,11 +1887,13 @@
- in the form of a comparison of a register against zero.
- If the condition is more complex than that, then it is safe
- not to record any information. */
-- if (GET_CODE (reg) == REG
-+ inv_cond = reversed_comparison_code (cond_true, BB_END (bb));
-+ if (inv_cond != UNKNOWN
-+ && GET_CODE (reg) == REG
- && XEXP (cond_true, 1) == const0_rtx)
- {
- rtx cond_false
-- = gen_rtx_fmt_ee (reverse_condition (GET_CODE (cond_true)),
-+ = gen_rtx_fmt_ee (inv_cond,
- GET_MODE (cond_true), XEXP (cond_true, 0),
- XEXP (cond_true, 1));
- if (GET_CODE (XEXP (set_src, 1)) == PC)
+++ /dev/null
-By Lennert Buytenhek <buytenh@wantstofly.org>
-Adds support for arm*b-linux* big-endian ARM targets
-
-See http://gcc.gnu.org/PR16350
-
-diff -urN gcc-3.4.1-dist/gcc/config/arm/linux-elf.h gcc-3.4.1/gcc/config/arm/linux-elf.h
---- gcc-3.4.1-dist/gcc/config/arm/linux-elf.h 2004-08-16 16:01:50.000000000 -0500
-+++ gcc-3.4.1/gcc/config/arm/linux-elf.h 2004-08-16 15:43:40.000000000 -0500
-@@ -30,17 +30,34 @@
- /* Do not assume anything about header files. */
- #define NO_IMPLICIT_EXTERN_C
-
-+/*
-+ * 'config.gcc' defines TARGET_BIG_ENDIAN_DEFAULT as 1 for arm*b-*
-+ * (big endian) configurations.
-+ */
-+#if TARGET_BIG_ENDIAN_DEFAULT
-+#define TARGET_ENDIAN_DEFAULT ARM_FLAG_BIG_END
-+#define TARGET_ENDIAN_OPTION "mbig-endian"
-+#define TARGET_LINKER_EMULATION "armelfb_linux"
-+#else
-+#define TARGET_ENDIAN_DEFAULT 0
-+#define TARGET_ENDIAN_OPTION "mlittle-endian"
-+#define TARGET_LINKER_EMULATION "armelf_linux"
-+#endif
-+
- /* Default is to use APCS-32 mode. */
- #undef TARGET_DEFAULT
--#define TARGET_DEFAULT (ARM_FLAG_APCS_32 | ARM_FLAG_MMU_TRAPS)
-+#define TARGET_DEFAULT \
-+ ( ARM_FLAG_APCS_32 | \
-+ ARM_FLAG_MMU_TRAPS | \
-+ TARGET_ENDIAN_DEFAULT )
-
- #define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm6
-
--#define SUBTARGET_EXTRA_LINK_SPEC " -m armelf_linux -p"
-+#define SUBTARGET_EXTRA_LINK_SPEC " -m " TARGET_LINKER_EMULATION " -p"
-
- #undef MULTILIB_DEFAULTS
- #define MULTILIB_DEFAULTS \
-- { "marm", "mlittle-endian", "mhard-float", "mapcs-32", "mno-thumb-interwork" }
-+ { "marm", TARGET_ENDIAN_OPTION, "mhard-float", "mapcs-32", "mno-thumb-interwork" }
-
- #define CPP_APCS_PC_DEFAULT_SPEC "-D__APCS_32__"
-
-@@ -101,7 +118,7 @@
- %{rdynamic:-export-dynamic} \
- %{!dynamic-linker:-dynamic-linker /lib/ld-linux.so.2} \
- -X \
-- %{mbig-endian:-EB}" \
-+ %{mbig-endian:-EB} %{mlittle-endian:-EL}" \
- SUBTARGET_EXTRA_LINK_SPEC
- #endif
-
-diff -urN gcc-3.4.1-dist/gcc/config.gcc gcc-3.4.1/gcc/config.gcc
---- gcc-3.4.1-dist/gcc/config.gcc 2004-08-16 16:01:50.000000000 -0500
-+++ gcc-3.4.1/gcc/config.gcc 2004-08-16 16:01:25.000000000 -0500
-@@ -672,6 +672,11 @@
- ;;
- arm*-*-linux*) # ARM GNU/Linux with ELF
- tm_file="dbxelf.h elfos.h linux.h arm/elf.h arm/linux-gas.h arm/linux-elf.h arm/aout.h arm/arm.h"
-+ case $target in
-+ arm*b-*)
-+ tm_defines="TARGET_BIG_ENDIAN_DEFAULT=1 $tm_defines"
-+ ;;
-+ esac
- tmake_file="t-slibgcc-elf-ver t-linux arm/t-linux"
- extra_parts="crtbegin.o crtbeginS.o crtend.o crtendS.o"
- gnu_ld=yes
projects / gentoo.git / commitdiff