/* this should be done in _ai_modeX() */
win_out(0x29e0,AI_START_STOP_Select_Register);
- /* the following registers should not be changed:
- Clock_and_FOUT_Register
- AI_Mode_1_Register
- AI_Mode_3_Register
- AI_Personal_Register
- AI_Output_Control_Register
- AI_Trigger_Select_Register
+ /* the following registers should not be changed, because there
+ * are no backup registers in devpriv. If you want to change
+ * any of these, add a backup register and other appropriate code:
+ * Clock_and_FOUT_Register
+ * AI_Mode_1_Register
+ * AI_Mode_3_Register
+ * AI_Personal_Register
+ * AI_Output_Control_Register
+ * AI_Trigger_Select_Register
*/
-
win_out(0x3f80,Interrupt_A_Ack_Register); /* clear interrupts */
win_out(AI_Configuration_End,Joint_Reset_Register);
data|=mask;
}
s->io_bits=data;
- win_out(s->io_bits,DIO_Control_Register);
+ devpriv->dio_control &= ~DIO_Pins_Dir_Mask;
+ devpriv->dio_control |= DIO_Pins_Dir(s->io_bits);
+ win_out(devpriv->dio_control,DIO_Control_Register);
+#ifdef DEBUG_DIO
+ printk("Parallel DIO config bits=0x%x\n", s->io_bits);
+#endif
}else{
if(it->flags & TRIG_WRITE){
do_pack(&s->state,it);
- win_out(s->state,DIO_Output_Register);
+#ifdef DEBUG_DIO
+ printk("Parallel DIO write bits=0x%x\n", s->state);
+#endif
+ devpriv->dio_output &= ~DIO_Parallel_Data_Mask;
+ devpriv->dio_output |= DIO_Parallel_Data_Out(s->state);
+ win_out(devpriv->dio_output,DIO_Output_Register);
}else{
- data=win_in(DIO_Input_Register);
+ /* Using ni_readw to access the direct-mapped register
+ is faster by about 0.5us on my machine.
+ -bkeryan@ni.com */
+ /*data=win_in(DIO_Input_Register);*/
+ data=ni_readw(DIO_Parallel_Input);
di_unpack(data,it);
+#ifdef DEBUG_DIO
+ printk("Parallel DIO read bits=0x%x\n", data);
+#endif
}
}
static int ni_dio_insn_config(comedi_device *dev,comedi_subdevice *s,
comedi_insn *insn,lsampl_t *data)
{
+#ifdef DEBUG_DIO
+ printk("ni_dio_insn_config() chan=%d io=%d\n",
+ CR_CHAN(insn->chanspec),data[0]);
+#endif
if(insn->n!=1)return -EINVAL;
switch(data[0]){
case COMEDI_OUTPUT:
default:
return -EINVAL;
}
- win_out(s->io_bits,DIO_Control_Register);
+
+ devpriv->dio_control &= ~DIO_Pins_Dir_Mask;
+ devpriv->dio_control |= DIO_Pins_Dir(s->io_bits);
+ win_out(devpriv->dio_control,DIO_Control_Register);
return 1;
}
static int ni_dio_insn_bits(comedi_device *dev,comedi_subdevice *s,
comedi_insn *insn,lsampl_t *data)
{
+#ifdef DEBUG_DIO
+ printk("ni_dio_insn_bits() mask=0x%x bits=0x%x\n",data[0],data[1]);
+#endif
if(insn->n!=2)return -EINVAL;
if(data[0]){
s->state &= ~data[0];
s->state |= (data[0]&data[1]);
- win_out(s->state,DIO_Output_Register);
+ devpriv->dio_output &= ~DIO_Parallel_Data_Mask;
+ devpriv->dio_output |= DIO_Parallel_Data_Out(s->state);
+ win_out(devpriv->dio_output,DIO_Output_Register);
}
- data[1] = win_in(DIO_Input_Register);
+ data[1] = ni_readw(DIO_Parallel_Input);
return 2;
}
#endif
/* dio setup */
- win_out(s->io_bits,DIO_Control_Register);
+ devpriv->dio_control = DIO_Pins_Dir(s->io_bits);
+ win_out(devpriv->dio_control,DIO_Control_Register);
/* 8255 device */
s=dev->subdevices+3;
#define AO_START1_Pulse _bit0
#define DIO_Input_Register 7
+#define DIO_SDIN _bit4
#define AI_Command_1_Register 8
#define AI_Analog_Trigger_Reset _bit14
#define DIO_Output_Register 10
+#define DIO_Parallel_Data_Out(a) ((a)&0xff)
+#define DIO_Parallel_Data_Mask 0xff
+#define DIO_SDOUT _bit0
+#define DIO_Serial_Data_Out(a) (((a)&0xff)<<8)
+#define DIO_Serial_Data_Mask 0xff00
+
#define DIO_Control_Register 11
+#define DIO_Software_Serial_Control _bit11
+#define DIO_HW_Serial_Timebase _bit10
+#define DIO_HW_Serial_Enable _bit9
+#define DIO_HW_Serial_Start _bit8
+#define DIO_Pins_Dir(a) ((a)&0xff)
+#define DIO_Pins_Dir_Mask 0xff
#define AI_Mode_1_Register 12
#define AI_CONVERT_Source_Select(a) ((a)<<11)
#define AI_SI2_Load_A_Register 23
#define AI_SI2_Load_B_Register 25
+#define Joint_Status_1_Register 27
+#define DIO_Serial_IO_In_Progress_St _bit12
+
+#define DIO_Serial_Input_Register 28
+#define Joint_Status_2_Register 29
+
#define AO_Mode_1_Register 39
#define AO_UPDATE_Source_Select(x) (((x)&0x1f)<<11)
#define AO_UI_Source_Select(x) (((x)&0x1f)<<6)
#define AO_UC_Load_A_Register_Low 49
#define Clock_and_FOUT_Register 56
+#define DIO_Serial_Out_Divide_By_2 _bit13
+#define Slow_Internal_Timebase _bit11
+
#define Interrupt_Control_Register 59
#define AI_Output_Control_Register 60
#define boardtype ni_boards[dev->board]
#define NI_PRIVATE_COMMON \
- int dio; \
+ unsigned short dio_output; \
+ unsigned short dio_control; \
int ao0p,ao1p; \
int lastchan; \
int last_do; \
unsigned short gpct_input_select1; \
\
unsigned short ai_xorlist[512]; \
-
+ \
+ unsigned long serial_interval_ns; \
+ unsigned char serial_hw_mode; \
+ unsigned short clock_and_fout; \
#endif /* _COMEDI_NI_STC_H */