/* Specify uni/bip, se/diff, s/w conversion, and reset FIFO (even though we're not using it - MEV says so). */
outw_p(adccon, dev->iobase + PCI230_ADCCON);
- /* Wait for mux to settle */
- udelay(PCI230_MUX_SETTLE);
-
/* Convert n samples */
for(n=0;n<insn->n;n++){
/* trigger conversion */
/* Write value to DAC. */
pci230_ao_write(dev, data[i], chan);
-
-#if 0
- /* XXX screw the user. Only do this if the board gets upset if you don't */
- /* If we're writing more than one sample, wait for output to settle between successive writes */
- if (insn->n > 1) {
- udelay(PCI230_DAC_SETTLE);
- }
-#endif
}
/* return the number of samples read/written */
chanlims=chan | (chan<<4);
outb(chanlims,devpriv->BADR3+0);
- /* wait for mux to settle */
- udelay(10); //docs say wait 10µs
-
/* convert n samples */
for(n=0;n<insn->n;n++){
/* trigger conversion */
outb(devpriv->pg_gainlist[range],dev->iobase+DAS08AO_GAIN_CONTROL);
}
- /* wait for MUX to settle */
- udelay(2);
-
for(n=0;n<insn->n;n++){
/* clear over-range bits for 16-bit boards */
if (thisboard->ai_nbits == 16)