unsigned int length = num_bytes / bytes_per_sample(s);
sampl_t *array = data;
lsampl_t *larray = data;
-
for(i = 0; i < length; i++)
{
#ifdef PCIDMA
rt_printk("ni_mio_common: timeout loading channel/gain list\n");
}
-/* m series boards have new ai_config_fifo_data register which replaces
- * old configuration_memory_low and high registers. But the old registers still
- * seem to work, so I'm not going to bother to change it yet. */
static void ni_m_series_load_channelgain_list(comedi_device *dev,unsigned int n_chan,
unsigned int *list)
{
unsigned int chan, range, aref;
unsigned int i;
- unsigned int hi,lo;
+ unsigned config_bits = 0;
unsigned offset;
unsigned int dither;
unsigned int use_alt_src;
devpriv->stc_writew(dev, 1, Configuration_Memory_Clear);
- offset = 1 << (boardtype.adbits - 1);
+// offset = 1 << (boardtype.adbits - 1);
+ offset = 0;
for(i = 0; i < n_chan; i++)
{
chan = CR_CHAN(list[i]);
range_code = ni_gainlkup[boardtype.gainlkup][range];
devpriv->ai_offset[i] = offset;
- hi = 0;
if(use_alt_src)
{
unsigned bypass_bits = MSeries_AI_Bypass_Config_FIFO_Bit;
bypass_bits |= MSeries_AI_Bypass_Gain_Bits(range_code);
if(dither)
bypass_bits |= MSeries_AI_Bypass_Dither_Bit;
+ // don't use 2's complement encoding
+ bypass_bits |= MSeries_AI_Bypass_Polarity_Bit;
ni_writel(bypass_bits, M_Offset_AI_Config_FIFO_Bypass);
}else
{
switch( aref )
{
case AREF_DIFF:
- hi |= AI_DIFFERENTIAL;
+ config_bits |= MSeries_AI_Config_Channel_Type_Differential_Bits;
break;
case AREF_COMMON:
- hi |= AI_COMMON;
+ config_bits |= MSeries_AI_Config_Channel_Type_Common_Ref_Bits;
break;
case AREF_GROUND:
- hi |= AI_GROUND;
+ config_bits |= MSeries_AI_Config_Channel_Type_Ground_Ref_Bits;
break;
case AREF_OTHER:
break;
}
+ config_bits |= MSeries_AI_Config_Channel_Bits(chan);
+ config_bits |= MSeries_AI_Config_Bank_Bits(chan);
+ config_bits |= MSeries_AI_Config_Gain_Bits(range_code);
+ if(i == n_chan - 1) config_bits |= MSeries_AI_Config_Last_Channel_Bit;
+ if(dither) config_bits |= MSeries_AI_Config_Dither_Bit;
+ // don't use 2's complement encoding
+ config_bits |= MSeries_AI_Config_Polarity_Bit;
+ ni_writew(config_bits, M_Offset_AI_Config_FIFO_Data);
}
- hi |= AI_CONFIG_CHANNEL( chan );
-
- ni_writew(hi,Configuration_Memory_High);
-
- lo = range_code;
- if(i == n_chan - 1) lo |= AI_LAST_CHANNEL;
- if( dither ) lo |= AI_DITHER;
-
- ni_writew(lo,Configuration_Memory_Low);
}
ni_prime_channelgain_list(dev);
}