amcc_devices=NULL;
last=NULL;
-
-#if LINUX_VERSION_CODE < 0x020300
- for(pcidev=pci_devices;pcidev;pcidev=pcidev->next){
-#else
+
pci_for_each_dev(pcidev){
-#endif
if(pcidev->vendor==pci_vendor){
amcc=kmalloc(sizeof(*amcc),GFP_KERNEL);
memset(amcc,0,sizeof(*amcc));
if (last) { last->next=amcc; }
else { amcc_devices=amcc; }
last=amcc;
-
-#if LINUX_VERSION_CODE < 0x020300
- amcc->vendor=pcidev->vendor;
+
+ amcc->vendor=pcidev->vendor;
amcc->device=pcidev->device;
- amcc->master=pcidev->master;
amcc->pci_bus=pcidev->bus->number;
amcc->pci_slot=PCI_SLOT(pcidev->devfn);
amcc->pci_func=PCI_FUNC(pcidev->devfn);
for (i=0;i<5;i++)
- amcc->io_addr[i]=pcidev->base_address[i] & ~3UL;
+ amcc->io_addr[i]=pci_resource_start(pcidev, i) & PCI_BASE_ADDRESS_IO_MASK;
amcc->irq=pcidev->irq;
+#if LINUX_VERSION_CODE < 0x020300
+ amcc->master=pcidev->master;
#else
- amcc->vendor=pcidev->vendor;
- amcc->device=pcidev->device;
-#if 0
- amcc->master=pcidev->master; // how get this information under 2.4 kernels?
-#endif
- amcc->pci_bus=pcidev->bus->number;
- amcc->pci_slot=PCI_SLOT(pcidev->devfn);
- amcc->pci_func=PCI_FUNC(pcidev->devfn);
- for (i=0;i<5;i++)
- amcc->io_addr[i]=pcidev->resource[i].start & ~3UL;
- amcc->irq=pcidev->irq;
+// amcc->master=pcidev->master; // how get this information under 2.4 kernels?
#endif
}
dev->board_ptr = pci230_boards+i;
/* Read base addressses of the PCI230's two I/O regions from PCI configuration register. */
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,0)
- pci_iobase = pci_dev->base_address[2] & PCI_BASE_ADDRESS_IO_MASK;
- iobase = pci_dev->base_address[3] & PCI_BASE_ADDRESS_IO_MASK;
-#else
if(pci_enable_device(pci_dev)<0)return -EIO;
- pci_iobase = pci_dev->resource[2].start;
- iobase = pci_dev->resource[3].start;
-#endif
+ pci_iobase = pci_resource_start(pci_dev, 2) & PCI_BASE_ADDRESS_IO_MASK;
+ iobase = pci_resource_start(pci_dev, 3) & PCI_BASE_ADDRESS_IO_MASK;
printk("comedi%d: amplc_pci230: I/O region 1 0x%04x I/O region 2 0x%04x\n",dev->minor, pci_iobase, iobase);
* Initialize devpriv->control_status and devpriv->adc_fifo to point to
* their base address.
*/
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,0)
- s5933_config =
- devpriv->pci_dev->base_address[S5933_BADRINDEX] &
- PCI_BASE_ADDRESS_IO_MASK;
- control_status =
- devpriv->pci_dev->base_address[CONT_STAT_BADRINDEX] &
- PCI_BASE_ADDRESS_IO_MASK;
- adc_fifo =
- devpriv->pci_dev->base_address[ADC_FIFO_BADRINDEX] &
- PCI_BASE_ADDRESS_IO_MASK;
- pacer_counter_dio =
- devpriv->pci_dev->base_address[PACER_BADRINDEX] &
- PCI_BASE_ADDRESS_IO_MASK;
- ao_registers =
- devpriv->pci_dev->base_address[AO_BADRINDEX] &
- PCI_BASE_ADDRESS_IO_MASK;
-#else
if(pci_enable_device(devpriv->pci_dev))
return -EIO;
- s5933_config =
- devpriv->pci_dev->resource[S5933_BADRINDEX].start &
+ s5933_config = pci_resource_start(devpriv->pci_dev, S5933_BADRINDEX) &
PCI_BASE_ADDRESS_IO_MASK;
- control_status =
- devpriv->pci_dev->resource[CONT_STAT_BADRINDEX].start &
+ control_status = pci_resource_start(devpriv->pci_dev, CONT_STAT_BADRINDEX) &
PCI_BASE_ADDRESS_IO_MASK;
- adc_fifo =
- devpriv->pci_dev->resource[ADC_FIFO_BADRINDEX].start &
+ adc_fifo = pci_resource_start(devpriv->pci_dev, ADC_FIFO_BADRINDEX) &
PCI_BASE_ADDRESS_IO_MASK;
- pacer_counter_dio =
- devpriv->pci_dev->resource[PACER_BADRINDEX].start &
+ pacer_counter_dio = pci_resource_start(devpriv->pci_dev, PACER_BADRINDEX) &
PCI_BASE_ADDRESS_IO_MASK;
- ao_registers =
- devpriv->pci_dev->resource[AO_BADRINDEX].start &
+ ao_registers = pci_resource_start(devpriv->pci_dev, AO_BADRINDEX) &
PCI_BASE_ADDRESS_IO_MASK;
-#endif
// reserve io ports
err = 0;
/* Initialize devpriv->control_status and devpriv->adc_fifo to point to
* their base address.
*/
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,0)
- plx9080_iobase =
- pcidev->base_address[PLX9080_BADRINDEX] &
- PCI_BASE_ADDRESS_MEM_MASK;
- main_iobase =
- pcidev->base_address[MAIN_BADRINDEX] &
- PCI_BASE_ADDRESS_MEM_MASK;
- dio_counter_iobase =
- pcidev->base_address[DIO_COUNTER_BADRINDEX] &
- PCI_BASE_ADDRESS_MEM_MASK;
-#else
if(pci_enable_device(pcidev))
return -EIO;
#ifdef PCIDMA
pci_set_master(pcidev);
#endif
- plx9080_iobase =
- pcidev->resource[PLX9080_BADRINDEX].start &
+ plx9080_iobase = pci_resource_start(pcidev, PLX9080_BADRINDEX) &
PCI_BASE_ADDRESS_MEM_MASK;
- main_iobase =
- pcidev->resource[MAIN_BADRINDEX].start &
+ main_iobase = pci_resource_start(pcidev, MAIN_BADRINDEX) &
PCI_BASE_ADDRESS_MEM_MASK;
- dio_counter_iobase =
- pcidev->resource[DIO_COUNTER_BADRINDEX].start &
+ dio_counter_iobase = pci_resource_start(pcidev, DIO_COUNTER_BADRINDEX) &
PCI_BASE_ADDRESS_MEM_MASK;
if(check_mem_region(plx9080_iobase, PLX9080_IOSIZE))
request_mem_region(dio_counter_iobase, DIO_COUNTER_IOSIZE, "cb_pcidas64");
devpriv->dio_counter_phys_iobase = dio_counter_iobase;
-#endif
-
// remap, won't work with 2.0 kernels but who cares
devpriv->plx9080_iobase = (unsigned long)ioremap(plx9080_iobase, PLX9080_IOSIZE);
devpriv->main_iobase = (unsigned long)ioremap(main_iobase, MAIN_IOSIZE);
* Initialize devpriv->control_status and devpriv->adc_fifo to point to
* their base address.
*/
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,0)
- digitalio =
- devpriv->pci_dev->base_address[DIGITALIO_BADRINDEX] &
- PCI_BASE_ADDRESS_IO_MASK;
- dac =
- devpriv->pci_dev->base_address[DAC_BADRINDEX] &
- PCI_BASE_ADDRESS_IO_MASK;
-#else
if(pci_enable_device(devpriv->pci_dev))
return -EIO;
- digitalio =
- devpriv->pci_dev->resource[DIGITALIO_BADRINDEX].start &
- PCI_BASE_ADDRESS_IO_MASK;
- dac =
- devpriv->pci_dev->resource[DAC_BADRINDEX].start &
- PCI_BASE_ADDRESS_IO_MASK;
-#endif
+ digitalio = pci_resource_start(devpriv->pci_dev, DIGITALIO_BADRINDEX) &
+ PCI_BASE_ADDRESS_IO_MASK;
+ dac = pci_resource_start(devpriv->pci_dev, DAC_BADRINDEX) &
+ PCI_BASE_ADDRESS_IO_MASK;
/*
* Allocate the I/O ports.
}
devpriv->pdev = pdev;
// read base addresses
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,0)
- pci_iobase = pdev->base_address[1] & PCI_BASE_ADDRESS_IO_MASK;
- iobase = pdev->base_address[2] & PCI_BASE_ADDRESS_IO_MASK;
-#else
if(pci_enable_device(pdev))
return -EIO;
- pci_iobase = pdev->resource[1].start & PCI_BASE_ADDRESS_IO_MASK;
- iobase = pdev->resource[2].start & PCI_BASE_ADDRESS_IO_MASK;
-#endif
+ pci_iobase = pci_resource_start(pdev, 1) & PCI_BASE_ADDRESS_IO_MASK;
+ iobase = pci_resource_start(pdev, 2) & PCI_BASE_ADDRESS_IO_MASK;
printk("pcibase 0x%x ", pci_iobase);
// reserve io ports for 9052 pci chip
if(check_region(pci_iobase,PCIDAS08_SIZE)<0){
volatile int forever; /* flag indicating whether we should take data forever */
unsigned int divisor1; /* value to load into board's counter 1 for timed conversions */
unsigned int divisor2; /* value to load into board's counter 2 for timed conversions */
- int do_bits; /* digital output bits */
+ volatile int do_bits; /* digital output bits */
}das800_private;
#define devpriv ((das800_private *)dev->private)
pcibios_read_config_dword(mite->pci_bus,mite->pci_device_fn,PCI_BASE_ADDRESS_0,&addr);
#else
-#if LINUX_VERSION_CODE < 0x020300
- addr=mite->pcidev->base_address[0];
-#else
if(pci_enable_device(mite->pcidev)){
printk("error enabling mite\n");
return -EIO;
}
pci_set_master(mite->pcidev);
- addr=mite->pcidev->resource[0].start;
-#endif
+ addr=pci_resource_start(mite->pcidev, 0);
#endif
mite->mite_phys_addr=addr;
offset = mite->mite_phys_addr & ~PAGE_MASK;
#ifdef PCI_SUPPORT_VER1
pcibios_read_config_dword(mite->pci_bus,mite->pci_device_fn,PCI_BASE_ADDRESS_1,&addr);
#else
-#if LINUX_VERSION_CODE < 0x020300
- addr=mite->pcidev->base_address[1];
-#else
- addr=mite->pcidev->resource[1].start;
-#endif
+ addr=pci_resource_start(mite->pcidev, 1);
#endif
mite->daq_phys_addr=addr;
offset = mite->daq_phys_addr & ~PAGE_MASK;
* Initialize base addresses
*/
/* Get the physical address from PCI config */
-#if LINUX_VERSION_CODE < KERNEL_VERSION(2,3,0)
- physLas0 = devpriv->pci_dev->base_address[LAS0_PCIINDEX];
- physLas1 = devpriv->pci_dev->base_address[LAS1_PCIINDEX];
- physLcfg = devpriv->pci_dev->base_address[LCFG_PCIINDEX];
-#else
- physLas0 = devpriv->pci_dev->resource[LAS0_PCIINDEX].start;
- physLas1 = devpriv->pci_dev->resource[LAS1_PCIINDEX].start;
- physLcfg = devpriv->pci_dev->resource[LCFG_PCIINDEX].start;
-#endif
+ physLas0 = pci_resource_start(devpriv->pci_dev, LAS0_PCIINDEX) &
+ PCI_BASE_ADDRESS_MEM_MASK;
+ physLas1 = pci_resource_start(devpriv->pci_dev, LAS1_PCIINDEX) &
+ PCI_BASE_ADDRESS_MEM_MASK;
+ physLcfg = pci_resource_start(devpriv->pci_dev, LCFG_PCIINDEX) &
+ PCI_BASE_ADDRESS_MEM_MASK;
/* Now have the kernel map this into memory */
/* ASSUME page aligned */
devpriv->las0 = ioremap(physLas0, LAS0_PCISIZE);