Change "mystery numbers" to defines in ni_stc.h
authorDavid Schleef <ds@schleef.org>
Wed, 24 Jul 2002 00:23:15 +0000 (00:23 +0000)
committerDavid Schleef <ds@schleef.org>
Wed, 24 Jul 2002 00:23:15 +0000 (00:23 +0000)
comedi/drivers/ni_mio_common.c
comedi/drivers/ni_stc.h

index 410daf5db60cc056cff8a04a55f4643c2f10888d..972765af57350f5adffc4b6747f0035392d92210 100644 (file)
@@ -53,7 +53,7 @@
 */
 
 //#define DEBUG_INTERRUPT
-//#define DEBUG_STATUS_A
+#define DEBUG_STATUS_A
 //#define DEBUG_STATUS_B
 
 #include <linux/irq.h>
@@ -819,8 +819,15 @@ static int ni_ai_reset(comedi_device *dev,comedi_subdevice *s)
        /* generate FIFO interrupts on non-empty */
        win_out((0<<6)|0x0000,AI_Mode_3_Register);
 #endif
-       win_out(0xA420,AI_Personal_Register);
-       win_out(0x032e,AI_Output_Control_Register);
+       win_out(AI_SHIFTIN_Pulse_Width |
+               AI_SOC_Polarity |
+               AI_CONVERT_Pulse_Width |
+               AI_LOCALMUX_CLK_Pulse_Width, AI_Personal_Register);
+       win_out(AI_SCAN_IN_PROG_Output_Select(3) |
+               AI_EXTMUX_CLK_Output_Select(0) |
+               AI_LOCALMUX_CLK_Output_Select(2) |
+               AI_SC_TC_Output_Select(3) |
+               AI_CONVERT_Output_Select(2),AI_Output_Control_Register);
 
        /* this should be done in _ai_modeX() */
        win_out(0x29e0,AI_START_STOP_Select_Register);
@@ -1010,16 +1017,8 @@ static void ni_load_channelgain_list(comedi_device *dev,unsigned int n_chan,
 
        /* prime the channel/gain list */
 
-       win_out(1,AI_Command_1_Register);
-       if(boardtype.reg_611x){
-               /* The 611x has screwy 32-bit FIFOs. */
-               for(i=0;i<NI_TIMEOUT;i++){
-                       if(ni_readb(Status_611x)&0x80){
-                               ni_readl(ADC_FIFO_Data_611x);
-                               return;
-                       }
-               }
-       }else{
+       if(!boardtype.reg_611x){
+               win_out(1,AI_Command_1_Register);
                for(i=0;i<NI_TIMEOUT;i++){
                        if(!(win_in(AI_Status_1_Register)&AI_FIFO_Empty_St)){
                                win_out(1,ADC_FIFO_Clear);
@@ -1647,7 +1646,6 @@ static void ni_ao_fifo_load(comedi_device *dev,comedi_subdevice *s, int n)
                port = DAC_FIFO_Data;
        }
 
-printk("ao_fifo_load %d\n",n);
        offset = 1 << (boardtype.aobits - 1);
        chan = async->cur_chan;
        for(i=0;i<n;i++){
@@ -2226,18 +2224,23 @@ static int ni_E_init(comedi_device *dev,comedi_devconfig *it)
 
        /* ai configuration */
        ni_ai_reset(dev,dev->subdevices+0);
-       win_out(0x1ba0,Clock_and_FOUT_Register);
+       win_out(Slow_Internal_Time_Divide_By_2 |
+               Slow_Internal_Timebase |
+               Clock_To_Board_Divide_By_2 |
+               Clock_To_Board |
+               AI_Output_Divide_By_2 |
+               AO_Output_Divide_By_2, Clock_and_FOUT_Register);
 
        /* analog output configuration */
        ni_ao_reset(dev,dev->subdevices + 1);
 
         if(dev->irq){
-                win_out((IRQ_POLARITY<<0) |  /* polarity : active high */
-                        (0<<1) |  /* no interrupt on 3 pins */
-                        (1<<11) |  /* enable int A */
-                        (1<<15) |  /* enable int B */
-                        (interrupt_pin(dev->irq)<<8) |  /* interrupt output pin A */
-                        (interrupt_pin(dev->irq)<<12) ,  /* interrupt output pin B */
+                win_out((IRQ_POLARITY?Interrupt_Output_Polarity:0) |
+                       (Interrupt_Output_On_3_Pins&0) |
+                       Interrupt_A_Enable |
+                       Interrupt_B_Enable |
+                       Interrupt_A_Output_Select(interrupt_pin(dev->irq)) |
+                       Interrupt_B_Output_Select(interrupt_pin(dev->irq)),
                         Interrupt_Control_Register
                 );
         }
index fe669a77903a691045798402d4faca67efc8db14..5152de95a1c3aff333c637aa0419dd559b5c6c74 100644 (file)
 #define AO_UC_Load_A_Register_Low      49
 
 #define Clock_and_FOUT_Register                56
-#define DIO_Serial_Out_Divide_By_2              _bit13
-#define Slow_Internal_Timebase                  _bit11
+#define FOUT_Enable                            _bit15
+#define FOUT_Timebase_Select                   _bit14
+#define DIO_Serial_Out_Divide_By_2             _bit13
+#define Slow_Internal_Time_Divide_By_2         _bit12
+#define Slow_Internal_Timebase                 _bit11
+#define G_Source_Divide_By_2                   _bit10
+#define Clock_To_Board_Divide_By_2             _bit9
+#define Clock_To_Board                         _bit8
+#define AI_Output_Divide_By_2                  _bit7
+#define AI_Source_Divide_By_2                  _bit6
+#define AO_Output_Divide_By_2                  _bit5
+#define AO_Source_Divide_By_2                  _bit4
+#define FOUT_Divider(x)                                ((x)<<0)
 
 #define IO_Bidirection_Pin_Register    57
 
 #define Interrupt_Control_Register     59
+#define Interrupt_B_Enable                     _bit15
+#define Interrupt_B_Output_Select(x)           ((x)<<12)
+#define Interrupt_A_Enable                     _bit11
+#define Interrupt_A_Output_Select(x)           ((x)<<8)
+#define Pass_Thru_0_Interrupt_Polarity         _bit3
+#define Pass_Thru_1_Interrupt_Polarity         _bit2
+#define Interrupt_Output_On_3_Pins             _bit1
+#define Interrupt_Output_Polarity              _bit0
+
 #define AI_Output_Control_Register     60
+#define AI_START_Output_Select                 _bit10
+#define AI_SCAN_IN_PROG_Output_Select(x)       ((x)<<8)
+#define AI_EXTMUX_CLK_Output_Select(x)         ((x)<<6)
+#define AI_LOCALMUX_CLK_Output_Select(x)       ((x)<<4)
+#define AI_SC_TC_Output_Select(x)              ((x)<<2)
+#define AI_CONVERT_Output_Select(x)            ((x)<<0)
 
 #define AI_START_STOP_Select_Register  62
 #define AI_START_Polarity                      _bit15
 
 #define Second_IRQ_B_Enable_Register   76
 #define AI_Personal_Register           77
+#define AI_SHIFTIN_Pulse_Width                 _bit15
+#define AI_EOC_Polarity                                _bit14
+#define AI_SOC_Polarity                                _bit13
+#define AI_SHIFTIN_Polarity                    _bit12
+#define AI_CONVERT_Pulse_Timebase              _bit11
+#define AI_CONVERT_Pulse_Width                 _bit10
+#define AI_CONVERT_Original_Pulse              _bit9
+#define AI_FIFO_Flags_Polarity                 _bit8
+#define AI_Overrun_Mode                                _bit7
+#define AI_EXTMUX_CLK_Pulse_Width              _bit6
+#define AI_LOCALMUX_CLK_Pulse_Width            _bit5
+#define AI_AIFREQ_Polarity                     _bit4
+
 #define AO_Personal_Register           78
 #define Write_Strobe_0_Register                82
 #define Write_Strobe_1_Register                83