3 Hardware driver for NI PCI-MIO E series cards
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 1997-8 David A. Schleef <ds@stm.lbl.gov>
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 Description: National Instruments PCI-MIO-E series (all boards)
27 Status: mainly limited by Comedi infrastructure
28 Devices: [National Instruments] PCI-MIO-16XE-50 (ni_pcimio),
29 PCI-MIO-16XE-10, PXI-6030E, PCI-MIO-16E-1, PCI-MIO-16E-4, PCI-6040E,
30 PXI-6040E, PCI-6031E, PCI-6032E, PCI-6033E, PCI-6071E, PCI-6023E,
31 PCI-6024E, PCI-6025E, PXI-6025E, PCI-6034E, PCI-6035E, PCI-6052E,
32 PCI-6110E, PCI-6111E, PCI-6711, PCI-6713, PXI-6071E, PXI-6070E,
33 PXI-6052E, PCI-6036E, PCI-6731, PCI-6733
35 These boards are almost identical to the AT-MIO E series, except that
36 they use the PCI bus instead of ISA (i.e., AT). See the notes above for
37 ni_atmio.o for additional information about these boards.
39 Autocalibration is supported on many of the devices, using the
40 calibration utility in Comedilib.
42 By default, the driver uses DMA to transfer analog input data to
43 memory. When DMA is enabled, not all triggering features are
46 Streaming analog output is not supported on PCI-671x and PCI-673x.
48 PCI IDs are not known for PCI-6731 and PCI-6733. Digital I/O may not
51 Information (number of channels, bits, etc.) for some devices may be
55 - Driver doesn't stop correctly when DMA is enabled.
59 The PCI-MIO E series driver was originally written by
60 Tomasz Motylewski <...>, and ported to comedi by ds.
63 References for specifications:
65 341079b.pdf PCI E Series Register-Level Programmer Manual
66 340934b.pdf DAQ-STC reference manual
68 Other possibly relevant info:
70 320517c.pdf User manual (obsolete)
71 320517f.pdf User manual (new)
73 322080b.pdf 6711/6713/6715 User Manual
77 need to deal with external reference for DAC, and other DAC
78 properties in board properties
80 deal with at-mio-16de-10 revision D to N changes, etc.
82 need to add other CALDAC type
84 need to slow down DAC loading. I don't trust NI's claim that
85 two writes to the PCI bus slows IO enough. I would prefer to
86 use udelay(). Timing specs: (clock)
94 #include <linux/kernel.h>
95 #include <linux/module.h>
96 #include <linux/errno.h>
97 #include <linux/ioport.h>
98 #include <linux/delay.h>
100 #include <linux/interrupt.h>
101 #include <linux/slab.h>
102 #include <linux/comedidev.h>
103 #include <linux/init.h>
117 #define MAX_N_CALDACS (16+16+2)
119 /* The following two tables must be in the same order */
120 static struct pci_device_id ni_pci_table[] __devinitdata = {
121 { PCI_VENDOR_ID_NATINST, 0x0162, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
122 { PCI_VENDOR_ID_NATINST, 0x1170, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
123 { PCI_VENDOR_ID_NATINST, 0x11d0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
124 { PCI_VENDOR_ID_NATINST, 0x1180, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
125 { PCI_VENDOR_ID_NATINST, 0x1190, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
126 { PCI_VENDOR_ID_NATINST, 0x11c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
127 { PCI_VENDOR_ID_NATINST, 0x1330, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
128 { PCI_VENDOR_ID_NATINST, 0x1270, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
129 { PCI_VENDOR_ID_NATINST, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
130 { PCI_VENDOR_ID_NATINST, 0x1350, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
131 { PCI_VENDOR_ID_NATINST, 0x2a60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
132 { PCI_VENDOR_ID_NATINST, 0x2a70, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
133 { PCI_VENDOR_ID_NATINST, 0x2a80, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
134 { PCI_VENDOR_ID_NATINST, 0x2ab0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
135 { PCI_VENDOR_ID_NATINST, 0x2ca0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
136 { PCI_VENDOR_ID_NATINST, 0x2c80, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
137 { PCI_VENDOR_ID_NATINST, 0x18b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
138 { PCI_VENDOR_ID_NATINST, 0x14e0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
139 { PCI_VENDOR_ID_NATINST, 0x14f0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
140 { PCI_VENDOR_ID_NATINST, 0x1880, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
141 { PCI_VENDOR_ID_NATINST, 0x1870, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
142 { PCI_VENDOR_ID_NATINST, 0x15b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
143 { PCI_VENDOR_ID_NATINST, 0x11b0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
144 { PCI_VENDOR_ID_NATINST, 0x18c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
145 { PCI_VENDOR_ID_NATINST, 0x1580, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
146 { PCI_VENDOR_ID_NATINST, 0x2890, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
149 MODULE_DEVICE_TABLE(pci, ni_pci_table);
151 static ni_board ni_boards[]={
152 { device_id: 0x0162, // NI also says 0x1620. typo?
153 name: "pci-mio-16xe-50",
164 caldac: {dac8800,dac8043},
168 name: "pci-mio-16xe-10",
173 gainlkup: ai_gain_14,
179 caldac: {dac8800,dac8043,ad8522},
188 gainlkup: ai_gain_14,
194 caldac: {dac8800,dac8043,ad8522},
199 name: "pci-mio-16e-1",
204 gainlkup: ai_gain_16,
214 name: "pci-mio-16e-4", /* aka pci-6040e */
219 gainlkup: ai_gain_16,
234 gainlkup: ai_gain_16,
250 gainlkup: ai_gain_14,
256 caldac: {dac8800,dac8043,ad8522},
265 gainlkup: ai_gain_14,
271 caldac: {dac8800,dac8043,ad8522},
280 gainlkup: ai_gain_14,
286 caldac: {dac8800,dac8043,ad8522},
295 gainlkup: ai_gain_16,
400 gainlkup: ai_gain_16,
406 caldac: {ad8804,mb88341,ad8522}, /* manual is wrong */
409 { device_id: 0x0000, /* unknown */
415 gainlkup: ai_gain_16,
421 caldac: {ad8804,mb88341,ad8522}, /* manual is wrong */
430 gainlkup: ai_gain_611x,
437 caldac: {ad8804_debug,ad8804_debug,ad8804_debug},/* XXX */
445 gainlkup: ai_gain_611x,
453 caldac: {ad8804_debug,ad8804_debug,ad8804_debug},/* XXX */
457 n_adchan: 0, /* no analog input */
463 caldac: {mb88341,mb88341},/* XXX */
467 n_adchan: 0, /* no analog input */
471 ao_fifo_depth: 16384,
473 caldac: {mb88341,mb88341},/* XXX */
478 n_adchan: 0, /* no analog input */
484 caldac: {mb88341,mb88341},/* XXX */
488 n_adchan: 0, /* no analog input */
492 ao_fifo_depth: 16384,
494 caldac: {mb88341,mb88341},/* XXX */
503 gainlkup: ai_gain_16,
519 gainlkup: ai_gain_16,
534 gainlkup: ai_gain_16,
540 caldac: {mb88341,mb88341,ad8522},
548 gainlkup: ai_gain_14,
554 caldac: {dac8800,dac8043,ad8522},
572 #define n_pcimio_boards ((sizeof(ni_boards)/sizeof(ni_boards[0])))
574 static int pcimio_attach(comedi_device *dev,comedi_devconfig *it);
575 static int pcimio_detach(comedi_device *dev);
576 static comedi_driver driver_pcimio={
577 driver_name: "ni_pcimio",
579 attach: pcimio_attach,
580 detach: pcimio_detach,
582 COMEDI_INITCLEANUP(driver_pcimio);
585 /* How we access registers */
587 #define ni_writew(a,b) (writew((a),dev->iobase+(b)))
588 #define ni_readw(a) (readw(dev->iobase+(a)))
589 #define ni_writeb(a,b) (writeb((a),dev->iobase+(b)))
590 #define ni_readb(a) (readb(dev->iobase+(a)))
592 /* How we access STC registers */
594 /* We automatically take advantage of STC registers that can be
595 * read/written directly in the I/O space of the board. Most
596 * PCIMIO devices map the low 8 STC registers to iobase+addr*2.
597 * The 611x devices map the write registers to iobase+addr*2, and
598 * the read registers to iobase+(addr-1)*2. */
600 #define win_out(data,addr) do{ \
602 ni_writew((data),(addr)*2); \
604 ni_writew((addr),Window_Address); \
605 ni_writew((data),Window_Data); \
609 #define win_out2(data,addr) do{ \
610 win_out((data)>>16, (addr)); \
611 win_out((data)&0xffff, (addr)+1); \
614 #define win_in(addr) ( \
616 ? (ni_readw(((addr) - boardtype.reg_611x)*2)) \
617 : (ni_writew((addr),Window_Address),ni_readw(Window_Data)))
619 #define win_save() (ni_readw(Window_Address))
620 #define win_restore(a) (ni_writew((a),Window_Address))
622 #define ao_win_out(a,b) do{ \
623 ni_writew((b),AO_Window_Address_671x); \
624 ni_writew((a),AO_Window_Data_671x); \
629 #define interrupt_pin(a) 0
630 #define IRQ_POLARITY 1
632 #define NI_E_IRQ_FLAGS SA_SHIRQ
636 struct mite_struct *mite;
640 dma_addr_t ai_dma_handle;
642 #define devpriv ((ni_private *)dev->private)
645 #include "ni_mio_common.c"
648 static int pcimio_find_device(comedi_device *dev,int bus,int slot);
649 static int pcimio_ai_alloc(comedi_device *dev, comedi_subdevice *s,
650 unsigned long new_size);
653 /* cleans up allocated resources */
654 static int pcimio_detach(comedi_device *dev)
656 mio_common_detach(dev);
658 if(dev->private && devpriv->mite)
659 mite_unsetup(devpriv->mite);
662 comedi_free_irq(dev->irq,dev);
668 static int pcimio_attach(comedi_device *dev,comedi_devconfig *it)
672 printk("comedi%d: ni_pcimio:",dev->minor);
674 ret=alloc_private(dev,sizeof(ni_private));
677 ret=pcimio_find_device(dev,it->options[0],it->options[1]);
680 printk(" %s",boardtype.name);
681 dev->board_name=boardtype.name;
683 ret = mite_setup(devpriv->mite);
686 printk(" error setting up mite\n");
689 dev->iobase = mite_iobase(devpriv->mite);
691 dev->irq=mite_irq(devpriv->mite);
694 printk(" unknown irq (bad)\n");
696 printk(" ( irq = %d )",dev->irq);
697 if( (ret=comedi_request_irq(dev->irq,ni_E_interrupt,NI_E_IRQ_FLAGS,"ni_pcimio",dev))<0 ){
698 printk(" irq not available\n");
703 ret = ni_E_init(dev,it);
706 dev->subdevices[0].buf_alloc = pcimio_ai_alloc;
712 static int pcimio_find_device(comedi_device *dev,int bus,int slot)
714 struct mite_struct *mite;
717 for(mite=mite_devices;mite;mite=mite->next){
718 if(mite->used)continue;
720 if(bus!=mite->pcidev->bus->number ||
721 slot!=PCI_SLOT(mite->pcidev->devfn))
725 for(i=0;i<n_pcimio_boards;i++){
726 if(mite_device_id(mite)==ni_boards[i].device_id){
727 dev->board_ptr=ni_boards+i;
734 printk("no device found\n");
739 /* This needs to be fixed before it can be used for AO, since it
740 * uses devpriv->ai_dma_handle */
741 static int pcimio_ai_alloc(comedi_device *dev, comedi_subdevice *s,
742 unsigned long new_size)
746 ret = mite_buf_alloc(devpriv->mite, s->async, new_size);
751 comedi_async *async = s->async;
753 if(async->prealloc_buf && async->prealloc_bufsz == new_size){
757 if(async->prealloc_bufsz){
758 pci_free_consistent(devpriv->mite->pcidev,
759 async->prealloc_bufsz, async->prealloc_buf,
760 devpriv->ai_dma_handle);
761 async->prealloc_buf = NULL;
762 async->prealloc_bufsz = 0;
766 async->prealloc_buf = pci_alloc_consistent(devpriv->mite->pcidev,
767 new_size, &devpriv->ai_dma_handle);
768 if(async->prealloc_buf == NULL){
769 async->prealloc_bufsz = 0;
773 async->prealloc_bufsz = new_size;